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C8051F54X Datasheet(PDF) 41 Page - Silicon Laboratories |
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C8051F54X Datasheet(HTML) 41 Page - Silicon Laboratories |
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41 / 276 page  C8051F54x Rev. 1.1 41 SFR Address = 0xBE; SFR Page = 0x00 SFR Address = 0xBD; SFR Page = 0x00 SFR Definition 5.5. ADC0H: ADC0 Data Word MSB Bit 7 6 5 4 3 2 1 0 Name ADC0H[7:0] Type R/W Reset 0 0 0 0 0 0 0 0 Bit Name Function 7:0 ADC0H[7:0] ADC0 Data Word High-Order Bits. For AD0LJST = 0 and AD0RPT as follows: 00: Bits 3–0 are the upper 4 bits of the 12-bit result. Bits 7–4 are 0000b. 01: Bits 4–0 are the upper 5 bits of the 14-bit result. Bits 7–5 are 000b. 10: Bits 5–0 are the upper 6 bits of the 15-bit result. Bits 7–6 are 00b. 11: Bits 7–0 are the upper 8 bits of the 16-bit result. For AD0LJST = 1 (AD0RPT must be 00): Bits 7–0 are the most-significant bits of the ADC0 12-bit result. SFR Definition 5.6. ADC0L: ADC0 Data Word LSB Bit 7 6 5 4 3 2 1 0 Name ADC0L[7:0] Type R/W Reset 0 0 0 0 0 0 0 0 Bit Name Function 7:0 ADC0L[7:0] ADC0 Data Word Low-Order Bits. For AD0LJST = 0: Bits 7–0 are the lower 8 bits of the ADC0 Accumulated Result. For AD0LJST = 1 (AD0RPT must be '00'): Bits 7–4 are the lower 4 bits of the 12-bit result. Bits 3–0 are 0000b. |
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