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C8051F54X Datasheet(PDF) 42 Page - Silicon Laboratories |
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C8051F54X Datasheet(HTML) 42 Page - Silicon Laboratories |
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42 / 276 page  C8051F54x 42 Rev. 1.1 SFR Address = 0xE8; SFR Page = 0x00; Bit-Addressable SFR Definition 5.7. ADC0CN: ADC0 Control Bit 7 6 5 4 3 2 1 0 Name AD0EN BURSTEN AD0INT AD0BUSY AD0WINT AD0LJST AD0CM[1:0] Type R/W R/W R/W R/W R/W R/W R/W Reset 0 0 0 0 0 0 0 0 Bit Name Function 7 AD0EN ADC0 Enable Bit. 0: ADC0 Disabled. ADC0 is in low-power shutdown. 1: ADC0 Enabled. ADC0 is active and ready for data conversions. 6 BURSTEN ADC0 Burst Mode Enable Bit. 0: Burst Mode Disabled. 1: Burst Mode Enabled. 5 AD0INT ADC0 Conversion Complete Interrupt Flag. 0: ADC0 has not completed a data conversion since AD0INT was last cleared. 1: ADC0 has completed a data conversion. 4 AD0BUSY ADC0 Busy Bit. Read: 0: ADC0 conversion is not in progress. 1: ADC0 conversion is in progress. Write: 0: No Effect. 1: Initiates ADC0 Conver- sion if AD0CM[1:0] = 00b 3 AD0WINT ADC0 Window Compare Interrupt Flag. This bit must be cleared by software 0: ADC0 Window Comparison Data match has not occurred since this flag was last cleared. 1: ADC0 Window Comparison Data match has occurred. 2 AD0LJST ADC0 Left Justify Select Bit. 0: Data in ADC0H:ADC0L registers is right-justified 1: Data in ADC0H:ADC0L registers is left-justified. This option should not be used with a repeat count greater than 1 (when AD0RPT[1:0] is 01b, 10b, or 11b). 1:0 AD0CM[1:0] ADC0 Start of Conversion Mode Select. 00: ADC0 start-of-conversion source is write of 1 to AD0BUSY. 01: ADC0 start-of-conversion source is overflow of Timer 1. 10: ADC0 start-of-conversion source is rising edge of external CNVSTR. 11: ADC0 start-of-conversion source is overflow of Timer 2. |
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