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OMAP3530ECUS Datasheet(PDF) 245 Page - Texas Instruments

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Part # OMAP3530ECUS
Description  Applications Processors
PDF  265 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

OMAP3530ECUS Datasheet(HTML) 245 Page - Texas Instruments

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OMAP3530, OMAP3525
www.ti.com
SPRS507H – FEBRUARY 2008 – REVISED OCTOBER 2013
Table 6-134. MMC/SD/SDIO Switching Characteristics – High-Speed SD Mode (continued)
NO.
PARAMETER
1.15 V
1.0 V
UNIT
MIN
MAX
MIN
MAX
HSSD2
tW(clkL)
Typical pulse duration, output clk low
Y(5)*PO(4)
Y(5)*PO(4)
ns
tdc(clk)
Duty cycle error, output clk
1041.7
2083.3
ps
tj(clk)
Jitter standard deviation(6), output clk
200
200
ps
MMC/SD/SDIO Interface 1 (1.8 V IO)
tc(clk)
Rise time, output clk
3
3
ns
tW(clkH)
Fall time, output clk
3
3
ns
tW(clkL)
Rise time, output data
3
3
ns
tdc(clk)
Fall time, output data
3
3
ns
HSSD5
td(CLKOH-CMD)
Delay time, mmc1_clk rising clock edge to
3.7
14.1
4.1
34.5
ns
mmc1_cmd transition
HSSD6
td(CLKOH-DATx)
Delay time, mmc1_clk rising clock edge to
3.7
14.1
4.1
34.5
ns
mmc1_datx transition
MMC/SD/SDIO Interface 1 (3.0 V IO)
tc(clk)
Rise time, output clk
3
3
ns
tW(clkH)
Fall time, output clk
3
3
ns
tW(clkL)
Rise time, output data
3
3
ns
tdc(clk)
Fall time, output data
3
3
ns
HSSD5
td(CLKOH-CMD)
Delay time, mmc1_clk rising clock edge to
3.7
14.1
4.1
34.5
ns
mmc1_cmd transition
HSSD6
td(CLKOH-DATx)
Delay time, mmc1_clk rising clock edge to
3.7
14.1
4.1
34.5
ns
mmc1_datx transition
MMC/SD/SDIO Interface 2
tc(clk)
Rise time, output clk
3
3
ns
tW(clkH)
Fall time, output clk
3
3
ns
tW(clkL)
Rise time, output data
3
3
ns
tdc(clk)
Fall time, output data
3
3
ns
HSSD5
td(CLKOH-CMD)
Delay time, mmc2_clk rising clock edge to
3.7
14.1
4.1
34.5
ns
mmc2_cmd transition
HSSD6
td(CLKOH-DATx)
Delay time, mmc2_clk rising clock edge to
3.7
14.1
4.1
34.5
ns
mmc2_datx transition
MMC/SD/SDIO Interface 3
tc(clk)
Rise time, output clk
3
3
ns
tW(clkH)
Fall time, output clk
3
3
ns
tW(clkL)
Rise time, output data
3
3
ns
tdc(clk)
Fall time, output data
3
3
ns
HSSD5
td(CLKOH-CMD)
Delay time, mmc3_clk rising clock edge to
3.7
14.1
4.1
34.5
ns
mmc3_cmd transition
HSSD6
td(CLKOH-DATx)
Delay time, mmc3_clk rising clock edge to
3.7
14.1
4.1
34.5
ns
mmc3_datx transition
(5)
The Y parameter is defined as shown in Table 6-136.
(6)
The jitter probability density can be approximated by a Gaussian function.
Table 6-135. X Parameters
CLKD
X
1 or Even
0.5
Odd
(trunk[CLKD/2]+1)/CLKD
Copyright © 2008–2013, Texas Instruments Incorporated
TIMING REQUIREMENTS AND SWITCHING CHARACTERISTICS
245
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Product Folder Links: OMAP3530 OMAP3525



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