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TNETV2685FIBZUT7 Datasheet(PDF) 145 Page - Texas Instruments |
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TNETV2685FIBZUT7 Datasheet(HTML) 145 Page - Texas Instruments |
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145 / 191 page  15 16 3 2 4 1 38 13 7 6 HCS (input) HAS (input) HSTROBE(A) (input) HR/W (input) HRDY(B) (output) HD[31:0] (output) HCNTL[1:0] (input) 37 TMS320DM647 TMS320DM648 www.ti.com SPRS372H – MAY 2007 – REVISED APRIL 2012 A. HSTROBE refers to the following logical operation on HCS, HDS1, and HDS2: [NOT (HDS1 XOR HDS2)] OR HCS. B. Depending on the type of write or read operation (HPID without auto-incrementing; HPIA, HPIC, or HPID with auto- incrementing) and the state of the FIFO, transitions on HRDY may or may not occur. For more detailed information on the HPI peripheral, see the TMS320DM647/DM648 DSP Host Port Interface (HPI) User's Guide (literature number SPRUEL5) Figure 6-44. HPI32 Read Timing (HAS Not Used, Tied High) Copyright © 2007–2012, Texas Instruments Incorporated Peripheral Information and Electrical Specifications 145 Submit Documentation Feedback Product Folder Link(s): TMS320DM647 TMS320DM648 |
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