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VND5E008ASP-E Datasheet(PDF) 12 Page - STMicroelectronics |
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VND5E008ASP-E Datasheet(HTML) 12 Page - STMicroelectronics |
12 / 33 page ![]() Electrical specifications VND5E008ASP-E 12/33 DocID023813 Rev 4 Figure 4. Current sense delay characteristics ΔtDSENSE2H Delay response time between rising edge of output current and rising edge of current sense VSENSE < 4V; ISENSE = 90 % of ISENSE max; IOUT = 90 % of IOUTMAX; IOUTMAX = 6 A (see Figure 7) 300 µs tDSENSE2L Delay response time from falling edge of INPUT pin VSENSE < 4 V; 1.2 A < IOUT < 18 A; ISENSE = 10 % of ISENSE max; (see Figure 4) 520 µs 1. Parameter guaranteed by design; it is not tested. 2. Fault conditions includes: power limitation, overtemperature and open-load off-state detection. Table 10. Open-load detection (8 V < VCC < 18 V) Symbol Parameter Test conditions Min. Typ. Max. Unit VOL Open-load off-state voltage detection threshold VIN = 0 V; 8 V < VCC < 18 V 2 — 4 V IOL Open-load on-state current detection threshold VIN = 5 V; 8 V < VCC < 18 V; ISENSE = 5 µA 10 — 100 mA tDSTKON Output short circuit to VCC detection delay at turn off See Figure 5 180 — 1200 µs IL(off2) Off-state output current at VOUT = 4 V VIN = 0 V; VSENSE = 0 V; VOUT rising from 0 V to 4 V -120 — 0 µA td_vol Delay response from output rising edge to VSENSE rising edge in open-load VIN = 0 V; VOUT = 4 V; VSENSE = 90 % of VSENSEH —20 µs Table 9. Current sense (8 V < VCC < 18 V) (continued) Symbol Parameter Test conditions Min. Typ. Max. Unit |
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