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VND5E050ACKTR-E Datasheet(PDF) 31 Page - STMicroelectronics |
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VND5E050ACKTR-E Datasheet(HTML) 31 Page - STMicroelectronics |
31 / 43 page VND5E050ACJ-E, VND5E050ACK-E Package and PCB thermal data Doc ID 022515 Rev 2 31/43 4.2 PowerSSO-24 thermal data Figure 39. PowerSSO-24 PC board Note: Layout condition of Rth and Zth measurements (PCB: double layer, thermal vias, FR4 area= 77mm x 86mm, PCB thickness=1.6mm, Cu thickness=70µm (front and back side), copper areas: from minimum pad lay-out to 8cm2). Table 15. Thermal parameters Area/island (cm2)Footprint 2 8 R1=R7 (°C/W) 0.7 R2=R8 (°C/W) 2.8 R3 (°C/W) 4 R4 (°C/W) 8 8 7 R5 (°C/W) 22 15 10 R6 (°C/W) 26 20 15 C1=C7 (W.s/°C) 0.001 C2=C8 (W.s/°C) 0.0025 C3 (W.s/°C) 0.05 C4 (W.s/°C) 0.2 0.1 0.1 C5 (W.s/°C) 0.27 0.8 1 C6 (W.s/°C) 3 6 9 |
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