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PIC16F74-E/ML Datasheet(PDF) 129 Page - Microchip Technology |
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PIC16F74-E/ML Datasheet(HTML) 129 Page - Microchip Technology |
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129 / 174 page  2002 Microchip Technology Inc. DS30325B-page 127 PIC16F7X FIGURE 15-5: CLKOUT AND I/O TIMING TABLE 15-2: CLKOUT AND I/O TIMING REQUIREMENTS Note: Refer to Figure 15-3 for load conditions. OSC1 CLKOUT I/O Pin (Input) I/O Pin (Output) Q4 Q1 Q2 Q3 10 13 14 17 20, 21 19 18 15 11 12 16 Old Value New Value Param No. Symbol Characteristic Min Typ† Max Units Conditions 10* TosH2ckL OSC1 ↑ to CLKOUT↓ — 75 200 ns (Note 1) 11* TosH2ckH OSC1 ↑ to CLKOUT↑ — 75 200 ns (Note 1) 12* TckR CLKOUT rise time — 35 100 ns (Note 1) 13* TckF CLKOUT fall time — 35 100 ns (Note 1) 14* TckL2ioV CLKOUT ↓ to Port out valid —— 0.5TCY + 20 ns (Note 1) 15* TioV2ckH Port in valid before CLKOUT ↑ TOSC + 200 —— ns (Note 1) 16* TckH2ioI Port in hold after CLKOUT ↑ 0 —— ns (Note 1) 17* TosH2ioV OSC1 ↑ (Q1 cycle) to Port out valid — 100 255 ns 18* TosH2ioI OSC1 ↑ (Q2 cycle) to Port input invalid (I/O in hold time) Standard (F)100 —— ns Extended (LF)200 —— ns 19* TioV2osH Port input valid to OSC1 ↑ (I/O in setup time) 0 —— ns 20* TioR Port output rise time Standard (F) — 10 40 ns Extended (LF) —— 145 ns 21* TioF Port output fall time Standard (F) — 10 40 ns Extended (LF) —— 145 ns 22††* Tinp INT pin high or low time TCY —— ns 23††* Trbp RB7:RB4 change INT high or low time TCY —— ns * These parameters are characterized but not tested. † Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. †† These parameters are asynchronous events, not related to any internal clock edges. Note 1: Measurements are taken in RC mode, where CLKOUT output is 4 x TOSC. |
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