ADP7158ACPZ-2.8-R7
AI

The **ADP7158ACPZ-2.8-R7** is a high-performance, ultra-low noise, high Power Supply Rejection Ratio (PSRR) linear regulator (LDO) manufactured by Analog Devices. It is specifically designed to provide clean power to noise-sensitive precision analog circuits.
---
### 1. Key Technical Specifications
| Parameter | Specification |
|:---|:---|
| **Output Voltage (Fixed)** | 2.8 V |
| **Input Voltage Range** | 2.3 V to 5.5 V |
| **Maximum Output Current** | 2 A |
| **Typical Noise** | 0.9 µV rms (100 Hz to 100 kHz) |
| **PSRR** | >60 dB at 1 MHz; 70 dB at 10 kHz |
| **Dropout Voltage** | 120 mV (typical) at 2 A load |
| **Package** | 10-lead LFCSP (3mm x 3mm) |
| **Operating Temperature** | -40°C to +125°C |
---
### 2. Core Functional Parts & Pins
The device architecture is optimized for stability and noise suppression. Below are the critical pin functions:
* **VIN (Input Supply):** The power source for the LDO. It requires a decoupling capacitor to ground to minimize input ripples.
* **VOUT (Regulated Output):** Delivers the stable 2.8V. A low ESR ceramic capacitor is required for stability.
* **EN (Enable):** A logic-level input. Driving this high turns on the device; driving it low puts it into a low-current shutdown mode.
* **VREG (Internal Regulator):** An internal supply for the control circuitry. It usually requires an external bypass capacitor.
* **REF (Reference):** Connections for an external capacitor to filter the internal voltage reference, which is the key to achieving the sub-1µV noise performance.
* **BYP (Bypass):** Used to further filter noise from the error amplifier.
* **Exposed Pad:** Essential for thermal management; it must be soldered to the PCB ground plane to dissipate heat generated during high current output.
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### 3. Key Advantages
#### A. Ultra-Low Noise
With a noise floor of roughly **0.9 µV rms**, this LDO is one of the cleanest in the industry. This is vital for powering High-Speed ADCs, DACs, and precision VCOs where power supply noise directly translates to jitter or signal degradation.
#### B. High PSRR
Its ability to reject power supply noise (over 60dB at high frequencies like 1MHz) makes it ideal for post-regulating switching power supplies. It "cleans up" the high-frequency ripples left behind by DC-DC converters.
#### C. High Current Capability
While most low-noise LDOs are limited to 100mA - 500mA, the ADP7158 provides up to **2 Amperes**, allowing it to power entire RF signal chains or large FPGAs.
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### 4. Typical Application Circuit
```text
[Input 3.3V] ----+----[ VIN ] [ VOUT ]----+---- [Output 2.8V]
| |
[Cin] [Cout]
| |
[GND]-----------------------[GND]
```
* **Cin:** Typically 10 µF Ceramic.
* **Cout:** Typically 10 µF Ceramic (low ESR).
* **Cref/Cbyp:** Specific small-value capacitors (e.g., 1µF) are added to the REF and BYP pins to achieve the datasheet noise specs.
- ⤷
What are the thermal considerations when drawing the full 2A current from this LDO?
- ⤷ How does the ADP7158 compare to the ADP7159 in terms of output voltage flexibility?
- ⤷ Which specific capacitor types are recommended for the REF and BYP pins to minimize noise?