ADP7158ACPZ-3.3-R7
AI

The **ADP7158ACPZ-3.3-R7** is a high-performance, ultra-low noise, high Power Supply Rejection Ratio (PSRR) linear regulator (LDO) manufactured by Analog Devices. It is specifically designed to provide clean power to noise-sensitive precision analog circuits.
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### ## Technical Specifications
| Parameter | Value |
| :--- | :--- |
| **Output Voltage (Fixed)** | 3.3 V |
| **Input Voltage Range** | 2.3 V to 5.5 V |
| **Maximum Output Current** | 2 A |
| **Noise (10 Hz to 100 kHz)** | 0.9 µV rms |
| **PSRR (at 100 kHz)** | 70 dB |
| **Dropout Voltage (at 2 A)** | 120 mV (Typical) |
| **Package Type** | LFCSP-10 (3mm x 3mm) |
| **Operating Temperature** | -40°C to +125°C |
---
### ## Key Electronic Features
1. **Ultra-Low Noise Architecture:**
With a noise floor of just **0.9 µV rms**, this LDO is among the quietest in the industry. This is critical for applications like high-speed ADCs/DACs where power supply noise can directly translate into signal jitter or distortion.
2. **High PSRR:**
It effectively filters out ripples from switching regulators (DC-DC converters) that might precede it in the power chain, ensuring a stable DC output.
3. **Soft Start Capability:**
The device includes a dedicated programmable soft-start pin. By connecting a capacitor to the `SS` pin, you can control the ramp-up time of the output voltage to prevent inrush current.
4. **Precision Enable:**
The `EN` pin allows the chip to be turned on or off. It has a precise threshold, allowing it to be used for power sequencing or undervoltage lockout (UVLO) functions.
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### ## Pin Configuration (LFCSP-10)
The ADP7158 uses a 10-lead Lead Frame Chip Scale Package. Below is the functional breakdown of the key pins:
| Pin Name | Function |
| :--- | :--- |
| **VOUT** | Regulated 3.3V output. |
| **VIN** | Input power supply. |
| **VREG** | Output of the internal regulator providing power to the control circuitry. |
| **REF** | Reference voltage filter pin; requires a bypass capacitor to ground. |
| **BYP** | Bypass pin for noise reduction; requires a capacitor. |
| **SS** | Soft-start pin to control voltage ramp rate. |
| **EN** | Enable input. Drive high to turn on the device. |
| **EP** | Exposed Pad (Ground). Must be soldered to the PCB for thermal dissipation. |
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### ## Typical Application Circuit Code (Concept)
While this is a hardware component, in a PCB design environment (like Altium or KiCad), the electrical net connections would look similar to this logic:
```cpp
// Schematic Connection Logic
Component LDO1 = ADP7158ACPZ_3.3_R7;
LDO1.VIN = Power_Rail_5V;
LDO1.VOUT = Sensitive_Analog_Rail_3.3V;
LDO1.GND = System_Ground;
LDO1.EN = MCU_GPIO_Power_Enable;
// External Capacitors (Required for Stability)
C_IN = 10uF; // Ceramic
C_OUT = 10uF; // Ceramic
C_REF = 1uF; // Noise filtering
```
---
### ## Applications
* **RF Components:** Phase-locked loops (PLLs) and Voltage-controlled oscillators (VCOs).
* **Instrumentation:** High-resolution data converters (24-bit ADCs).
* **Medical:** Ultrasound and imaging equipment.
* **Networking:** Optical modules and high-speed clocking.
- ⤷What is the difference between the ADP7158 and the ADP7159?
- ⤷ What are the specific capacitor requirements for the REF and BYP pins?
- ⤷ How does the thermal management of the LFCSP package affect its current delivery?