The **FST1013** is a high-speed, low-power CMOS bus switch, typically manufactured by Fairchild Semiconductor (now part of ON Semiconductor). It belongs to the **FST (Fairchild Switch Technology)** family. --- ### ## 1. Technical Overview The FST1013 is a 10-bit bus switch designed to connect or disconnect two buses without adding significant propagation delay or generating additional ground bounce noise. ### ## 2. Pin Configuration & Functionality The device typically comes in a 24-pin package (such as QSOP or TSSOP). It functions as a single-pole, single-throw (SPST) switch for 10 individual lines. | Pin Type | Name | Description | | :--- | :--- | :--- | | **Inputs/Outputs** | A0 - A9 | Bus A data lines | | **Inputs/Outputs** | B0 - B9 | Bus B data lines | | **Control** | OE (or /OE) | Output Enable (Active Low) | | **Power** | Vcc | Positive Supply (typically 4.0V to 5.5V) | | **Ground** | GND | Ground Reference | --- ### ## 3. Key Electronic Characteristics The FST1013 is valued for its "transparent" operation. * **Low On-Resistance ($R_{on}$):** Typically around $4\Omega$ to $8\Omega$. This ensures minimal signal distortion and voltage drop. * **Zero Propagation Delay:** Because it is a simple FET switch rather than a buffer/driver, it does not have a clock-to-output delay. * **High Impedance in OFF State:** When the OE pin is High, the A and B ports are isolated, drawing minimal leakage current. * **Hot Swap Capability:** Designed to support insertion into "live" backplanes without damaging the bus or the part. --- ### ## 4. Common Applications 1. **Bus Isolation:** Separating a heavily loaded bus into smaller segments to reduce capacitance. 2. **Voltage Level Translation:** If Vcc is set to 5V and a diode is added to the power rail, it can be used to interface 5V logic with 3.3V logic. 3. **Memory Interfacing:** Swapping banks of memory or I/O devices on a shared data bus. 4. **Signal Multiplexing:** Directing data flows between different processors or peripherals. --- ### ## 5. Example Schematic Logic In a typical circuit, the control logic would look like this: ```text Control Signal (OE) -> Low => (A0-A9) connected to (B0-B9) Control Signal (OE) -> High => (A0-A9) disconnected from (B0-B9) [High Impedance] ```