LCMXO2-2000HC-6TG144I
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The **LCMXO2-2000HC-6TG144I** is a member of the MachXO2 family from Lattice Semiconductor. It is an ultra-low-power, instant-on, non-volatile PLD (Programmable Logic Device) designed to bridge the gap between low-density CPLDs and high-capacity FPGAs.
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### 1. Key Technical Specifications
| Parameter | Specification |
| :--- | :--- |
| **Logic Cells (LUTs)** | 2112 LUT4s |
| **Embedded Block RAM (EBR)** | 74 Kbits |
| **User Flash Memory (UFM)** | 64 Kbits |
| **I/O Pins** | 111 User I/Os |
| **Voltage Supply (Core)** | 2.5V to 3.3V ("HC" series) |
| **Package Type** | TQFP-144 (Thin Quad Flat Pack) |
| **Speed Grade** | -6 (Standard High Performance) |
| **Temperature Range** | -40°C to +100°C (Industrial Grade) |
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### 2. Functional Architecture
The device architecture is optimized for system control and interface expansion:
* **Non-Volatile Configuration:** It features on-chip Flash memory. This means the device does not require an external PROM to load its configuration on power-up; it is "Instant-on."
* **Hardened IP Blocks:** Unlike traditional FPGAs where you use logic cells for common protocols, this chip includes dedicated hardware (Hard IP) for:
* **I2C Interfaces** (up to 2 controllers)
* **SPI Interface**
* **Timer/Counters**
* **WISHBONE Bus:** An internal bus structure that allows easy connection between the hardened IP and the user-defined logic.
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### 3. Part Number Breakdown
Understanding the nomenclature helps in identifying its specific capabilities:
| Code Segment | Meaning |
| :--- | :--- |
| **LCMXO2** | MachXO2 Product Family |
| **2000** | Logic Density (~2112 Look-Up Tables) |
| **HC** | High-Voltage Core (2.5V / 3.3V Operation) |
| **6** | Speed Grade (Scale of 4 to 6, where 6 is fastest) |
| **TG144** | 144-pin TQFP Lead-Free Package |
| **I** | Industrial Temperature Rating |
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### 4. Typical Applications
* **System Glue Logic:** Interfacing between CPUs and peripherals with mismatched voltage levels or protocols.
* **Power Sequencing:** Managing the power-up and power-down cycles of complex SoCs and FPGAs.
* **I/O Expansion:** Adding more GPIOs, PWMs, or UARTs to a microcontroller that has run out of pins.
* **Display Interfacing:** Driving small LCD character or graphic displays.
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What is the difference between the HC and ZE variants of the MachXO2 family?
- ⤷ How do I program the internal Flash of the LCMXO2-2000HC?
- ⤷ What software toolchain is required for developing with Lattice MachXO2 FPGAs?