The **M95320-RMB3G/P** is a specific variant of a serial SPI (Serial Peripheral Interface) EEPROM manufactured by **STMicroelectronics**. It belongs to a family of non-volatile memory devices commonly used for parameter storage and data logging in embedded systems. --- ## 1. Device Specifications The table below highlights the key electrical and physical characteristics of this part: | Feature | Specification | | :--- | :--- | | **Memory Size** | 32 Kbit (4,096 bytes x 8 bits) | | **Interface** | SPI (Mode 0 and Mode 3) | | **Supply Voltage ($V_{CC}$)** | 1.8V to 5.5V | | **Clock Frequency** | Up to 20 MHz (at 4.5V - 5.5V) | | **Package Type** | UFDFPN8 (Ultra-thin Fine pitch Dual Flat No-lead) | | **Temperature Range** | -40°C to +125°C (Grade 3) | | **Write Cycles** | 4 Million cycles | | **Data Retention** | 200 Years | --- ## 2. Part Number Breakdown The suffix **"RMB3G/P"** provides specific details about the configuration: * **M95320**: Base series (32 Kbit SPI EEPROM). * **-R**: Operating voltage range of 1.8V to 5.5V. * **MB**: Package code for **UFDFPN8** (MLP8), 2x3 mm. * **3**: Device grade 3 (Operating temperature -40 to +125 °C). * **G**: ECOPACK2 (RoHS compliant and halogen-free). * **P**: Internal ST code related to the manufacturing process or packing. --- ## 3. Key Electronic Functions ### Instruction Set The device is controlled via a set of standard 8-bit opcodes. Communication is full-duplex through the SPI bus. ```c // Common SPI Opcodes for M95320 #define WREN 0x06 // Write Enable #define WRDI 0x04 // Write Disable #define RDSR 0x05 // Read Status Register #define WRSR 0x01 // Write Status Register #define READ 0x03 // Read from Memory #define WRITE 0x02 // Write to Memory ``` ### Protection Features 1. **Hardware Write Protection**: The `W` pin (Pin 3) can be used to freeze the memory contents when used in conjunction with the Status Register bits. 2. **Software Protection**: Block protection bits (BP0, BP1) allow the user to protect 1/4, 1/2, or the entire memory array from being overwritten. 3. **Hold Function**: The `HOLD` pin (Pin 7) allows the communication to be paused without deselecting the device, which is useful when sharing the SPI bus with higher-priority interrupts. --- ## 4. Typical Application Circuit When integrating this part into a PCB design, ensure the following connections: * **VCC/VSS**: Decouple with a 0.1µF ceramic capacitor placed close to the pins. * **Pull-up Resistors**: It is recommended to pull the `CS` (Chip Select) and `HOLD` pins high to prevent floating states during MCU reset. * **Logic Levels**: Ensure the SPI master (MCU) logic levels match the supply voltage of the EEPROM.