DESCRIPTION
The 74V2G70 is an advanced high-speed CMOS TRIPLE NOT INVERTED BUFFER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology.
The internal circuit is composed of 3 stages including buffer output, which provide high noise immunity and stable output.
Power down protection is provided on all inputs and outputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage.

■ HIGH SPEED: tPD = 3.0ns (TYP.) at VCC = 5V
■ LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA=25°C
■ HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.)
■ POWER DOWN PROTECTION ON INPUTS AND OUTPUTS
■ SYMMETRICAL OUTPUT IMPEDANCE:
    |IOH| = IOL = 8mA (MIN) at VCC = 4.5V
    IIOH| = IOL = 4mA (MIN) at VCC = 3.0V
■ BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL
■ OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 5.5V
■ IMPROVED LATCH-UP IMMUNITY