INTRODUCTION

This application note describes a fullñduplex, wireless data communication link targeted for RSñ232 applications.

An encoding technique has been designed which addresses many of the problems incurred when attempting to implement the RSñ232 (EIAñ232) standard, including but not limited to: hardware flow control, the DC component of the transmitted signal, automatic synchronization from host to slave and error detection. The design emulates a RSñ232 null modem cable for computerñtoñcomputer communications.

The actual design was realized with standard SSI logic from the high speed CMOS family (MC74HCxxx), an HC05

based MCU, and Motorolaís ISM Band RF chipset. The targeted data rate was 57,600 Baud, although both higher

and lower data rates are easily attainable. It is expected that most applications would embed the logic functions (and possibly the MCU functions) into a FPGA, CPLD, ASIC, or other LSI logic building block.