1. General description
The 74LVT14 is a hex inverter with Schmitt-trigger inputs. Bus hold data inputs eliminate the need
for external pull-up resistors to define unused inputs. This device is fully specified for partial power
down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially
damaging backflow current through the device when it is powered down.
2. Features and benefits
• Different positive and negative going input threshold voltages
• Tolerant of slow input transitions
• Wide supply voltage range from 2.7 to 3.6 V
• Overvoltage tolerant inputs to 5.5 V
• BiCMOS high speed and output drive
• Output capability: +32 mA/-20 mA
• High noise immunity
• Direct interface with TTL levels
• No bus current loading when output is tied to 5 V bus
• Power-up 3-state
• IOFF circuitry provides partial Power-down mode operation
• Latch-up protection exceeds 500 mA per JESD78 class II level A
• Complies with JEDEC standard JESD8C (2.7 V to 3.6 V)
• ESD protection:
• HBM JESD22-A114E exceeds 2000 V
• MM JESD22-A115-A exceeds 200 V
• Specified from -40 °C to +85 °C