| Manufacturer | Part # | Datasheet | Description |
ON Semiconductor |
NB6L11
|
212Kb / 12P |
2.5 V/3.3 V Multilevel Input to Differential LVPECL/LVNECL 1:2 Clock or Data Fanout Buffer/Translator
November, 2006 ??Rev. 6 |
|
NB7V58M
|
164Kb / 8P |
1.8 V / 2.5 V / 3.3 V Differential 2:1 Clock / Data Multiplexer / Translator with CML Outputs
August, 2009 ??Rev. 0 |
|
NBXSBA024
|
118Kb / 6P |
2.5 V / 3.3 V, 622.08 MHz LVPECL Clock Oscillator LVPECL Differential Output
April, 2011 ??Rev. 4 |
|
MC100LVEL91
|
146Kb / 6P |
3.3 V Triple LVPECL Input to -3.3 V to -5.0 V ECL Output Translator
July, 2016 ??Rev. 12 |
|
MC100LVELT20
|
135Kb / 6P |
3.3V LVTTL/LVCMOS to Differential LVPECL Translator
July, 2016 ??Rev. 1 |
|
NB4L52
|
149Kb / 8P |
2.5 V/3.3 V/5.0 V Differential Data/Clock D Flip-Flop
August, 2009 ??Rev. 3 |
|
NB4L339
|
144Kb / 12P |
2.5 V / 3.3 V Differential 2:1 Clock IN to Differential LVPECL Clock Generator
September, 2012 ??Rev. 3 |
|
NBSG53A
|
167Kb / 17P |
2.5 V/3.3 V SiGe Selectable Differential Clock and Data D Flip-Flop/Clock Divider
June, 2014 ??Rev. 15 |
|
NB4L16MMNEVB
|
772Kb / 12P |
2.5V/3.3V, 5 Gb/s Multi Level Clock/Data Input to CML Driver/Receiver/Buffer/ Translator with Internal Termination
August, 2016 ??Rev. 4 |
|
NB7L216MNEVB
|
414Kb / 11P |
2.5 V / 3.3 V, 12Gb/s Multi Level Clock/Data Input to RSECL, High Gain Receiver/Buffer/Translator with Internal Termination
August, 2016 ??Rev. 6 |
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