1 Features
• Stable with no output capacitor or any value or
type of capacitor
• Input voltage range of 1.7V to 5.5V
• Ultra-low dropout voltage: 75mV typ
• Excellent load transient response—with or without
optional output capacitor
• NMOS topology delivers low reverse leakage
current
• Low noise: 30μVRMS typ (10Hz to 100kHz)
• 0.5% initial accuracy
• 1% overall accuracy over line, load, and
temperature
• Less than 1μA max IQ in shutdown mode
• Thermal shutdown and specified min/max current
limit protection
• Available in multiple output voltage versions:
– Fixed outputs of 1.20V to 5.0V
– Adjustable output from 1.20V to 5.5V
– Custom outputs available

2 Applications
• Portable-, battery-powered equipment
• Post-regulation for switching supplies
• Noise-sensitive circuitry such as VCOs
• Point of load regulation for DSPs, FPGAs, ASICs,
and microprocessors

3 Description
The TPS736 low-dropout (LDO) linear voltage
regulator uses a new topology: an NMOS pass
transistor in a voltage-follower configuration. This
topology is stable using output capacitors with low
ESR, and even allows operation without a capacitor.
The device also provides high reverse blockage (low
reverse current) and ground pin current that is nearly
constant over all output current values.
The TPS736 uses an advanced BiCMOS process
to yield high precision while delivering very low
dropout voltages and low ground pin current. Current
consumption, when not enabled, is under 1μA and
designed for portable applications. The extremely low
output noise (30μVRMS with 0.1μF CNR) is designed
for powering VCOs. This device is protected by
thermal shutdown and foldback current limit.