DESCRIPTION
The PM3351 is a low-cost, highly integrated stand-alone single-chip switching device for 10/100 Mbit/s Ethernet (IEEE 802.3u, IEEE 802.12) switching and bridging applications. The device supports all processing required for switching Ethernet packets between the on-chip Medium Independent Interface (MII) port and the built-in 1 Gbit/s expansion port, to which other PM3351 (ELAN 1x100) or PM3350 (ELAN 8x10) devices may be attached.

FEATURES
• Single-chip, 1-port, full duplex or half duplex, 10/100BaseT switching device for
   low-cost unmanaged and managed networks.
• On-chip 50 MHz RISC CPU processor core, multi-channel DMA controller,
   MAC-layer interface logic, FIFOs, PCI-based expansion port and a flexible
   memory controller.
• CPU supports background applications running on local OS (e.g., SNMP or
   RMON), and real-time data oriented applications (e.g., frame forwarding and
   filtering decisions).
• Performs frame switching at a rate of 200 Mbit/s (full duplex), 100 Mbit/s (half
   duplex).
• Fully compatible with the PM3350, 8-port 10 Mbit/s switch device; may be used
   to create a compact and inexpensive mixed 10/100 Mbit/s switching hub.
• Store-and-forward operation with full error checking and filtering.
• Filtering and switching at wire rates (up to 148,800 packets per second),
   supporting a mix of Ethernet and IEEE 802.3 protocols.
• Expansion port supports a peak system bandwidth of 1 Gbit/s, and is compatible
   with industry-standard PCI bus (version 2.1).
• Performs all address learning, address table management and aging functions
   for up to 32,768 MAC addresses (limited by external memory). Address
   learning rate of up to 100,000 addresses per second.
• Maximum broadcast/multicast at wire rates with configurable broadcast storm
   rate limiting.
• Low-latency operation in both unicast and broadcast modes.
• Implements the Link Partition function to isolate malfunctioning segments or
   hosts.
• IEEE 802.1d compliant spanning-tree transparent bridging supported on-chip,
   with configurable aging time and frame lifetime control.
• Flow control supported for both full duplex and half duplex operation: supports
   IEEE 802.3x PAUSE frame flow control in full-duplex mode, and supports user-enabled
   backpressure flow control in half-duplex mode with configurable buffer
   thresholds and limits.
• Configuration, management, MIB statistics and diagnostics available in-band or
   out-of-band.
• Maintains and collects per-port and per-host statistics at wire rates, allowing a
   network switch comprised of PM3351 and PM3350 chips to implement RMON
   statistics (EtherStats and HostStats) using supplied on-chip firmware.
• Interfaces directly to industry-standard 100 Mbit/s transceivers with no glue logic
   via the built-in Medium Independent Interface (MII) port with full support for the
   autonegotiation function implemented by the PHY devices.
• Fully static CMOS operation at 50 MHz clock rates.
• 3.3 Volt core, 5 Volt compatible I/O
• 208 pin PQFP package.