1 Features
1• Designed for Signaling Rates up to 400-Mbps
• 3.3-V Power Supply Design
• 300-ps Typical Differential Skew
• 400-ps Maximum Differential Skew
• 1.7-ns Maximum Propagation Delay
• ±350-mV Differential Signaling
• Low Power Dissipation (13 mW at 3.3-V Static)
• Interoperable With Existing 5-V LVDS Receivers
• High impedance on LVDS Outputs on Power
Down
• Flow-Through Pinout Simplifies PCB Layout
• Meets or Exceeds TIA/EIA-644 LVDS Standard
• Industrial Operating Temperature Range
(−40°C to +85°C)
• Available in TSSOP Package

2 Applications
• Multifunction Printers
• Board-to-Board Communication
• Test and Measurement
• Printers
• Data Center Interconnect
• Lab Instrumentation
• Ultrasound Scanners

3 Description
The DSLVDS1047 device is a quad CMOS flowthrough
differential line driver designed for
applications requiring ultra-low power dissipation and
high data rates. The device is designed to support
data rates in excess of 400 Mbps (200 MHz) using
Low Voltage Differential Signaling (LVDS)
technology.
The DSLVDS1047 accepts low voltage TTL/CMOS
input levels and translates them to low voltage
(350 mV) differential output signals. In addition, the
driver supports a TRI-STATE function that may be
used to disable the output stage, disabling the load
current, and thus dropping the device to an ultra low
idle power state of 13 mW typical. The DSLVDS1047
has a flow-through pinout for easy PCB layout.
The EN and EN* inputs are ANDed together and
control the TRI-STATE outputs. The enables are
common to all four drivers. The and companion line
receiver (DSLVDS1048) provide a new alternative to
high power psuedo-ECL devices for high speed pointto-
point interface applications.