1FEATURES
· Dual 3.3-V Differential LVPECL/LVDS to LVTTL
Buffer Translator
· 24-mA LVTTL Ouputs
· Operating Range
– PECL VCC = 3 V to 3.6 V With
GND = 0 V
· Support for Clock Frequencies to >180 MHz
· 2-ns Typical Propagation Delay
· Internal Input Pullup and Pulldown Resistors
· Built-in Temperature Compensation
· Drop-In Compatible to MC100LVELT23

APPLICATIONS
· Data and Clock Transmission Over Backplane
· Signaling Level Conversion for Clock or Data

DESCRIPTION
The SN65LVELT23 is a low-power dual
LVPECL/LVDS to LVTTL translator device. The
device includes circuitry to maintain inputs at VCC/2
when left open. The SN65LVELT23 is housed in an
industry-standard SOIC-8 package and is also
available in a TSSOP-8 option.