1 Features
• Operating range from 1.1V to 5.5V
• 5.5V tolerant input pins
• Supports standard pinouts
• Latch-up performance exceeds 100mA
per JESD 78
• Supports defense and aerospace applications:
– Controlled baseline
– One assembly and test site
– One fabrication site
– Extended product life cycle
– Product traceability

2 Applications
• Enable or disable a digital signal
• Controlling an indicator LED

3 Description
The SN74LVC1G175B-EP device is a single D-type
flip-flop with asynchronous clear (CLR) input. When
CLR is HIGH, data from the input pin (D) transfers
to the output pin (Q) on the rising edge of the clock
(CLK). When CLR is LOW, the Q is forced into the
LOW state, regardless of the clock edge or data on D.