1 Features
• Functional Safety-Capable (Planned)
– Documentation available to aid IEC 61508 system design
• Supports High Bandwidth and Clock Sensitive Applications
– Up to 200Mbps data rate
– Low Propagation Delay: 9ns maximum at 5V, 10ns maximum at 3.3V
– SPI up to: 27.75MHz at 5V, 25MHz at 3.3V
– Low Pulse Width Distortion: 1.2ns maximum at 5V, 1.2ns maximum at 3.3V
– Low Jitter: 7ps (RMS) typical supports low impact to ADC and DAC SNR for the sample clock signal
– Low Channel to Channel Skew: 1.2ns maximum at 5V, 1.2ns maximum at 3.3V
– Low Part to Part Skew: 3ns maximum at 5V, 3ns maximum at 3.3V
• Supports High Channel Density Applications:
– Low Power: 0.635mA maximum per channel at 1Mbps and 3.3V
– Small Footprint Packages: SSOP (DBQ-16) , Wide-SSOP (DFP-16)
• Robust SiO2 isolation barrier:
– High lifetime at up to 1061VRMS and 1500VDC working voltage
– Wide temperature range: –40°C to 125°C
– Up to 5000VRMS isolation rating
– Up to 10.4kV surge capability
– Up to ±175kV/μs typical CMTI
• Supply range: 1.71V to 5.5V
• Overvoltage tolerant inputs
• Default output high ( ISO604xH ) and low ( ISO604xL ) options
• Robust electromagnetic compatibility (EMC)
– System-level ESD, EFT, and surge immunity
– Low emissions
• Safety-Related Certifications (Planned):
– DIN EN IEC 60747-17 (VDE 0884-17)
– UL 1577 and CSA CAS Notice No. 5A
– IEC 62368-1, IEC 61010-1 and GB 4943.1 certifications