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1032 Datasheet (PDF) - Lattice Semiconductor

1032 Datasheet PDF - Lattice Semiconductor
Part # 1032
Download  1032 Download

File Size   151.11 Kbytes
Page   12 Pages
Manufacturer  LATTICE [Lattice Semiconductor]
Direct Link  http://www.latticesemi.com
Logo LATTICE - Lattice Semiconductor
Description In-System Programmable High Density PLD

1032 Datasheet (PDF)

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1032 Datasheet PDF - Lattice Semiconductor

Part # 1032
Download  1032 Click to download

File Size   151.11 Kbytes
Page   12 Pages
Manufacturer  LATTICE [Lattice Semiconductor]
Direct Link  http://www.latticesemi.com
Logo LATTICE - Lattice Semiconductor
Description In-System Programmable High Density PLD

1032 Datasheet (HTML) - Lattice Semiconductor

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1032 Product details

Description
The ispLSI 1032/883 is a High-Density Programmable Logic Device processed in full compliance to MIL-STD-883. This military grade device contains 192 Registers, 64 Universal I/O pins, eight Dedicated Input pins, four Dedicated Clock Input pins and a Global Routing Pool (GRP). The GRP provides complete interconnectivity between all of these elements. The ispLSI 1032/883 features 5-Volt in-system programming and in-system diagnostic capabilities. It is the first device which offers non-volatile reprogrammability of the logic, as well as the interconnect to provide truly reconfigurable systems.

Features
• HIGH-DENSITY PROGRAMMABLE LOGIC
    — High Speed Global Interconnect
    — 6000 PLD Gates
    — 64 I/O Pins, Eight Dedicated Inputs
    — 192 Registers
    — Wide Input Gating for Fast Counters, State Machines, Address Decoders, etc.
    — Small Logic Block Size for Fast Random Logic
    — Security Cell Prevents Unauthorized Copying
• HIGH PERFORMANCE E2CMOS® TECHNOLOGY
    — fmax = 60 MHz Maximum Operating Frequency
    — tpd = 20 ns Propagation Delay
    — TTL Compatible Inputs and Outputs
    — Electrically Erasable and Reprogrammable
    — Non-Volatile E2CMOS Technology
    — 100% Tested
• IN-SYSTEM PROGRAMMABLE
    — In-System Programmable™ (ISP™) 5-Volt Only
    — Increased Manufacturing Yields, Reduced Time-to-Market, and Improved Product Quality
    — Reprogram Soldered Devices for Faster Prototyping
• COMBINES EASE OF USE AND THE FAST SYSTEM SPEED OF PLDs WITH THE DENSITY AND FLEXIBILITY OF FIELD PROGRAMMABLE GATE ARRAYS
    — Complete Programmable Device Can Combine Glue Logic and Structured Designs
    — Four Dedicated Clock Input Pins
    — Synchronous and Asynchronous Clocks
    — Flexible Pin Placement
    — Optimized Global Routing Pool Provides Global Interconnectivity
• ispDesignEXPERT™ – LOGIC COMPILER AND COMPLETE ISP DEVICE DESIGN SYSTEMS FROM HDL SYNTHESIS THROUGH IN-SYSTEM PROGRAMMING
    — Superior Quality of Results
    — Tightly Integrated with Leading CAE Vendor Tools
    — Productivity Enhancing Timing Analyzer, Explore Tools, Timing Simulator and ispANALYZER™
    — PC and UNIX Platforms




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