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FDMF6705V Datasheet(PDF) 3 Page - ON Semiconductor |
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FDMF6705V Datasheet(HTML) 3 Page - ON Semiconductor |
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3 / 19 page  © 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com FDMF6705V • Rev. 1.0.2 2 Typical Application Circuit Figure 1. Typical Application Circuit DrMOS Block Diagram Figure 2. DrMOS Block Diagram SMOD# PWM VCIN VDRV VIN PGND PHASE GH DBoot BOOT GL CGND DISB# THWN# Q1 HS Power MOSFET Input 3-State Logic RUP_PWM VCIN VCIN VCC UVLO GH Logic Level Shift Dead-Time Control Temp. Sense 30k Ω 30k Ω GL Logic 10µA 10µA RDN_PWM Q2 LS Power MOSFET VSWH VIN UVLO 5V LDO VCIN SMOD# PWM VCIN VDRV LOUT COUT CVIN VIN PGND VSWH PHASE HDRV CGND DBoot BOOT Control LDRV CGND DISB # THWN# VDRV =8V to15 V VIN =3V to15V Q2 Q1 5V Linear Reg. Temp Sense C VDRV CVCI PWM Control VCIN Enable Disabled ON OFF VOUT VCIN |
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