MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

Order Number: MPC9449/D

Rev 1, 08/2002

1

3.3V/2.5V 1:15 PECL/LVCMOS

Clock Fanout Buffer

The MPC9449 is a 3.3V or 2.5V compatible, 1:15 clock fanout buffer

targeted for high performance clock tree applications. With output

frequencies up to 200 MHz and output skews less than 200 ps the device

meets the needs of the most demanding clock applications.

Features

inputs

computing applications

Functional Description

The MPC9449 is specifically designed to distribute LVCMOS

compatible clock signals up to a frequency of 200 MHz. The device has

15 identical outputs, organized in 4 output banks. Each output bank

provides a retimed or frequency divided copy of the input signal with a

near zero skew. The output buffer supports driving of 50

Ω terminated

transmission lines on the incident edge: each output is capable of driving

either one parallel terminated or two series terminated transmission lines.

Two selectable LVCMOS compatible clock inputs are available. This feature supports redundant differential clock sources. In

addition, the MPC9449 accepts one differential PECL clock signal. The DSELx pins choose between division of the input

reference frequency by one or two. The frequency divider can be set individually for each of the four output banks. Applying the

OE control will force the outputs into high-impedance mode.

All inputs have an internal pull-up or pull-down resistor preventing unused and open inputs from floating. The device supports a

2.5V or 3.3V power supply and an ambient temperature range of –40

°C to +85°C. The MPC9449 is pin and function compatible

but performance-enhanced to the MPC949. The device is packaged in a 52-lead LQFP package.

FA SUFFIX

52 LEAD LQFP PACKAGE

CASE 848D

MPC9449

3.3V/2.5V 1:15

PECL/LVCMOS

CLOCK FANOUT BUFFER

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com