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SL28PCIe30ALIT Datasheet(PDF) 8 Page - Silicon Laboratories |
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SL28PCIe30ALIT Datasheet(HTML) 8 Page - Silicon Laboratories |
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8 / 16 page ![]() SL28PCIe30 DOC#: SP-AP-0775 (Rev. 0.2) Page 8 of 16 Byte 14: Control Register 14 . Programmable frequency clarification SL28PCIe30 allows flexibility of programming a frequency to two single ended outputs - Prog_SE1 and Prog_SE2 respec- tively. Both Prog_SE1 and Prog_SE2 can be factory programmed to any frequency as required by the end user with a 3.3V swing single ended output. Prog_SE1 clock can have a feature of Spread Spectrum to reduce EMI where as Prog_SE2 is an non-spread option. 0 0 Wireless Friendly mode Wireless Friendly Mode 0 = Disabled, Default all single-ended clocks slew rate config bits to ‘101’ 1 = Enabled, Default all single-ended clocks slew rate config bits to ‘111’ Bit @Pup Name Description 7 1 RESERVED RESERVED 6 0 RESERVED RESERVED 5 1 RESERVED RESERVED 40 OTP_4 OTP_ID Idenification for programmed device 30 OTP_3 20 OTP_2 10 OTP_1 00 OTP_0 |
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