MB90387 datasheet(28/82 Pages) CYPRESS

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Document Number: 002-07765 Rev. *A

Page 27 of 81

MB90387/387S/F387/F387S

MB90V495G

Port 5 Pins Block Diagram

Port 5 Registers

■ Port 5 registers include port 5 data register (PDR5), port 5 direction register (DDR5), and analog input permission register (ADER).

■ Analog input permission register (ADER) allows or disallows input of analog signal to the analog input pin.

■ The bits configuring the register correspond to port 5 pins on a one-to-one basis.

Relation between Port 5 Registers and Pins

Port Name

Bits of Register and Corresponding Pins

Port 5

PDR5, DDR5

bit7

bit6

bit5

bit4

bit3

bit2

bit1

bit0

ADER

ADE7

ADE6

ADE5

ADE4

ADE3

ADE2

ADE1

ADE0

Corresponding pins

P57

P56

P55

P54

P53

P52

P51

P50

ADER

P-ch

N-ch

Standby control: Control among Stop mode (SPL=1), Time-base timer mode (SPL=1), and watch mode

(SPL=1).

Port data register (PDR)

PDR read

Output latch

PDR write

Port direction register (DDR)

Direction

latch

DDR write

DDR read

Standby control (SPL=1)

Analog input

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