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S71PL254 Datasheet(PDF) 104 Page - SPANSION |
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S71PL254 Datasheet(HTML) 104 Page - SPANSION |
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104 / 196 page ![]() 104 Type 2 pSRAM pSRAM_Type02_15A0 May 3, 2004 Advance I n f o rmation ACC Characteristics (Ta = -40°C to 85°C, VCC = 2.7 to 3.1 V) Notes: 1. tWP (min)=70ns for continuous write operation over 50 times. Symbol Parameter Speed Bins Unit 70ns Min Max tRC Read Cycle Time 70 — ns tAA Address Access Time — 70 ns tCO Chip Select to Output — 70 ns tOE Output Enable to Valid Output — 35 ns tBA UB#, LB# Access Time — 70 ns tLZ Chip Select to Low-Z Output 10 — ns tBLZ UB#, LB# Enable to Low-Z Output 10 — ns tOLZ Output Enable to Low-Z Output 5 — ns tHZ Chip Disable to High-Z Output 0 25 ns tBHZ UB#, LB# Disable to High-Z Output 0 25 ns tOHZ Output Disable to High-Z Output 0 25 ns tOH Output Hold from Address Change 5 — ns tPC Page Cycle Time 25 — ns tPA Page Access Time — 20 ns tWC Write Cycle Time 70 — ns tCW Chip Select to End of Write 60 — ns tAS Address Set-up Time 0 — ns tAW Address Valid to End of Write 60 — ns tBW UB#, LB# Valid to End of Write 60 — ns tWP Write Pulse Width 55 (Note 1) — ns tWR Write Recovery Time 0 — ns tWHZ Write to Output High-Z 0 25 ns tDW Data to Write Time Overlap 30 — ns tDH Data Hold from Write Time 0 — ns tOW End Write to Output Low-Z 5 — ns |
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