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MP4033GS Datasheet(PDF) 7 Page - Monolithic Power Systems |
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MP4033GS Datasheet(HTML) 7 Page - Monolithic Power Systems |
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7 / 25 page ![]() MP4033—PRIMARY-SIDE–CONTROL, OFFLINE LED CONTROLLER WITH PFC MP4033 Rev. 1.0 www.MonolithicPower.com 7 10/22/2014 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. ELECTRICAL CHARACTERISTICS (continued) Typical values are VCC =20V, TJ = 25°C, unless otherwise noted. Minimum and maximum values are at VCC =20V, TJ = -40°C to +125°C, unless otherwise noted, guaranteed by characterization. Parameter Symbol Condition Min Typ Max Units Current Sense Comparator Leading-Edge-Blanking Time t LEB 350 500 750 ns Over-Current-Protection Leading-Edge-Blanking Time t LEB_OCP 260 350 550 ns Over-Current-Protection Threshold V OCP 2.56 2. 70 2.86 V Current Sense Upper Clamp Voltage V S CLAMP H 1.97 2.07 2.17 V Current Sense Lower Clamp Voltage V S CLAMP L 0.01 0.035 0.09 V Zero-Current Detector Zero-Current–Detect Threshold V ZCD T Falling Edge 0.27 0.30 0.33 V Zero-Current–Detect Hysteresis V ZCD HYS 550 590 625 mV ZCD Pin Short Circuit Threshold V ZCD_SC 78 100 122 mV ZCD Pin Short Circuit Blanking time t ZCD_SC_LEB 33 ms Zero-Current–Detect LEB t ZCD_LEB Starts at Gate Turn Off when V MULT O ≥0.25V 1.90 2.30 3.36 µs Starts at Gate Turn Off when V MULT 0 <0.25V 0.95 1.18 1.68 µs Over-Voltage Threshold V ZCD OVP 4.90 5.30 5.70 V OVP Detect LEB t OVP_LEB Starts at Gate Turn Off when V MULT O≥0.25V 1.90 2.30 3.36 µs Starts at Gate Turn Off when V MULT O <0.25V 0.95 1.18 1.68 µs Minimum Off Time t OFF_MIN Normal 4 5.3 8 µs NTC≤1.0V 10 µs Weak/Strong DP Mode detector current (for leading edge dimmer) IDP_DET_LD 140 180 220 µA Strong DP Mode Enable Threshold (for leading edge dimmer) VEN_DP_STR_LD 1.13 1.18 1.23 V Weak/Strong DP Mode Detection Time (for leading edge dimmer) tDP_DET_LD 150 215 320 µs Starter Start Timer Period t START 100 130 165 µs |
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