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LTC7130 Datasheet(PDF) 4 Page - Linear Technology

Part # LTC7130
Description  20V 20A Monolithic Buck Converter with Ultralow DCR Sensing
PDF  36 Pages
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC7130 Datasheet(HTML) 4 Page - Linear Technology

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LTC7130
4
7130fb
For more information www.linear.com/LTC7130
ELECTRICAL CHARACTERISTICS The
l
denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = 12V, VRUN = 5V unless otherwise specified.
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC7130 is tested under pulsed load conditions such that
TJ ≈ TA. The LTC7130E is guaranteed to meet performance specifications
from 0°C to 85°C operating junction temperature. Specifications over
the –40°C to 125°C operating junction temperature range are assured by
design, characterization and correlation with statistical process controls.
The LTC7130I is guaranteed to meet performance specifications over the
full –40°C to 125°C operating junction temperature range. The maximum
ambient temperature consistent with these specifications is determined
by specific operating conditions in conjunction with board layout, the
package thermal impedance and other environmental factors. The thermal
derating curves are based on the LTC7130 demo board.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
CLKOUT
Phase Relative to the
Oscillator Clock
180
Deg
CLKOUTHI
Clock Output High Voltage
VINTVCC = 5.5V
4.5
5.5
V
CLKOUTLO
Clock Output Low Voltage
0
0.2
V
PGOOD Output
VPGDLO
PGOOD Voltage Low
IPGOOD = 2mA
0.1
0.3
V
IPGD
PGOOD Leakage Current
VPGOOD = 5.5V
2
µA
VPGD
PGOOD Trip
VFB with Respect to Set Output Voltage
VFB Going Negative
VFB Going Positive
–10
10
%
%
Differential Amplifier
AV
Gain
–40°C to 125°C
l
0.997
1
1.003
V/V
RIN
Input Resistance
Measured at DIFFP Input
80
kΩ
VOS
Input Offset Voltage
VDIFFP = 1.5V, VDIFFOUT = 100µA
2
mV
PSRR
Power Supply Rejection Ratio 5V < VIN < 20V (Note 7)
90
dB
IOUT
Maximum Sourcing Output
Current
1.5
2
mA
VOUT
Maximum Output Voltage
VINTVCC = 5.5V, IDIFFOUT = 300µA
VINTVCC – 1.4 VINTVCC – 1.1
V
GBW
Gain-Bandwidth Product
(Note 7)
3
MHz
SR
Slew Rate
(Note 7)
2
V/µs
RDS(ON)
RTOP
Top Power NMOS On-
Resistance
7.3
mΩ
RBOTTOM
Bottom Power NMOS On-
Resistance
2.1
mΩ
Note 3: When 4.5V ≤ VIN ≤ 5.5V, INTVCC must be tied to VIN. Guaranteed
by design.
Note 4: The LTC7130 is tested in a feedback loop that servos VITH to a
specified voltage and measures the resultant VFB.
Note 5: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency. See Applications Information.
Note 6: The minimum on-time condition corresponds to the on inductor
peak-to-peak ripple current ≥40% of IMAX (see Minimum On-Time
Considerations in the Applications Information section).
Note 7: Guaranteed by design.



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