LTC4232 datasheet(15/20 Pages) LINER

15 / 20 page

LTC4234

4234fa

For more information www.linear.com/LTC4234

APPLICATIONS INFORMATION

Therefore it is acceptable to set the current limit timeout

using CT to be 0.8ms:

CT =

0.8ms

12 ms/µF

[

]

= 68nF

To configure the LTC4234 for auto retry after overcurrent

fault, connect the FLT to the UV pin.

After the 0.8ms timeout the FLT pin pulls down on the UV

pin restart the power-up sequence.

The values for overvoltage, undervoltage and power good

thresholds using the resistive dividers on the UV, OV and

FB pins match the requirements of turn-on at 9.88V and

turn-off at 15.2V.

The final schematic in Figure 5 results in very few external

components. The pull-up resistor, R7, connects to the PG

pin while the 20k (RMON) converts the IMON current to a

voltage at a ratio:

VIMON = 5[µA/A] • 20k • IOUT = 0.1[V/A] • IOUT

In addition there is a 1µF bypass (C1) on the INTVCC pin

andnotetheconnectionbetweenSENSEtoSENSE−(Pin 34

to Pin 31).

Layout Considerations

In Hot Swap applications where load currents can be 20A,

narrowPCBtracksexhibitmoreresistancethanwidertracks

and operate at elevated temperatures. The minimum trace

width requirement for 1oz copper foil is 0.02" per amp to

make sure the trace stays at a reasonable temperature.

Using 0.03" per amp or wider is recommended. Note that

1oz copper exhibits a sheet resistance of about 0.5mΩ/

square. Small resistances add up quickly in high current

applications.

TheinputsupplyshouldbetiedtoVDDexposedpadthrough

a PCB trace that enters between Pin 1 and Pin 38. The VDD

pad connects to the sense resistor and MOSFET. Globally

there are three DNC pins that are unconnected and left

open (pins 6, 8, 33). Connect the SENSE– pin (pin 34) to

the SENSE pin (pin 31). Figure 6 shows a recommended

layout for the LTC4234.

During normal operation the power dissipated in the

MOSFET could be as high as 2.9W. To remove this heat

solder the SENSE exposed pad to a copper trace that

contains vias underneath the pad. The OUT pins conduct

substantial heat from the MOSFET. Connect all the OUT

pins to a plane of 1oz copper. Since the trace that connects

OUT pins must accommodate high current, this area of

copper is usually present. It is also important to put C1,

the bypass capacitor for the INTVCC pin as close as pos-

sible between INTVCC and GND.

Thermal Considerations

The LTC4234 junction to board temperature rise in still air

when the load current is 10A, 15A and 20A is shown in

curves of Figure 7 and Figure 8. The junction temperature

was measured at the package and the board temperature

was measured at the board edge. This temperature rise

falls as the board area is increases from 6.45cm2 to

103cm2. Two different SENSE pad areas are shown as

separate figures.

This thermal test board uses 2oz copper on the top layer

divided equally between VDD and OUT traces similar to

GND

4234 F06

VDD

OUT

SENSE

VDD

Figure 6. Recommended Layout

LTC4232 Datasheet(PDF) 15 Page - Linear Technology

LTC4232 Datasheet(HTML) 15 Page - Linear Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

Datasheet Download

Link URL