9

4251b12f

LTC4251B/LTC4251B-1/

LTC4251B-2

OPERATION

Hot Circuit Insertion

When circuit boards are inserted into a live backplane, the

supply bypass capacitors can draw huge transient currents

from the power bus as they charge. The flow of current

damages the connector pins and glitches the power bus,

causing other boards in the system to reset. The LTC4251B/

LTC4251B-1/LTC4251B-2 are designed to turn on a circuit

board supply in a controlled manner, allowing insertion or

removal without glitches or connector damage.

Initial Start-Up

The LTC4251B/LTC4251B-1/LTC4251B-2 reside on a re-

movable circuit board and control the path between the

connector and load or power conversion circuitry with an

external MOSFET switch (see Figure 1). Both inrush control

and short-circuit protection are provided by the MOSFET.

A detailed schematic is shown in Figure 2. –48V and

–48RTN receive power through the longest connector pins,

and are the first to connect when the board is inserted.

The GATE pin holds the MOSFET off during this time. UV/

OV determines whether or not the MOSFET should be

turned on based upon internal, high accuracy thresholds

and an external divider. UV/OV does double duty by also

monitoring whether or not the connector is seated. The top

of the divider detects –48RTN by way of a short connector

pin that is the last to mate during the insertion sequence.

Interlock Conditions

A start-up sequence commences once five initial “interlock”

conditions are met:

The first two conditions are continuously monitored and

the latter three are checked prior to initial timing or GATE

ramp-up. Upon exiting an OV condition, the TIMER pin

voltage requirement is inhibited. Details are described in

the Applications Information, Timing Waveforms section.

TIMER begins the start-up sequence by sourcing 5.8μA

then waits until the aforementioned conditions are once

charging the MOSFET gate and associated capacitance.

Note that for simplicity, the following assumptions are made in the text. Firstly, UV/OV also means the UV

the OV comparator in this part is disabled.

Figure 1. Basic LTC4251B Hot Swap Topology

Figure 2. –48V, 2.5A Hot Swap Controller

4251b12 F01

LTC4251B

ISOLATED

DC/DC

CONVERTER

MODULE

LOW

VOLTAGE

CIRCUITRY

++

––

PLUG-IN BOARD

BACKPLANE

–48RTN

–48V

+

3

4

1

2

4251b12 F02

–48RTN

–48V

UV/OV

TIMER

SENSE

GATE

LTC4251B

R1

402k

1%

R2

32.4k

1%

150nF

18nF

20m

Ω

Q1

IRF530S

10

Ω

10k

500mW

C1

10nF

1μF

†

DDZ13B**

100μF

TYP

LONG

LONG

SHORT

**DIODES, INC.

†RECOMMENDED FOR HARSH ENVIRONMENTS

+