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ICS951901 Datasheet(PDF) 3 Page - Integrated Circuit Systems |
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ICS951901 Datasheet(HTML) 3 Page - Integrated Circuit Systems |
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3 / 19 page  3 ICS951901 0670B—07/15/04 Byte0: Functionality and Frequency Select Register (default = 0) Serial Configuration Command Bitmap Note: PWD = Power-Up Default Note1: Default at power-up will be for latched logic inputs to define frequency, as displayed by Bit 3. I 2C is a trademark of Philips Corporation FS3 FS2 FS1 FS0 CPU SDRAM PCI AGP1 AGP0 Spread % PWD Bit2 Bit7 Bit6 Bit5 Bit4 MHz MHz MHz SEL=1 SEL=0 00000 66.67 66.67 33.33 66.67 64 ± 0.35% center spread 00001 66.67 100.00 33.33 66.67 64 ± 0.35% center spread 00010 66.67 133.34 33.33 66.67 64 ± 0.35% center spread 00011 75.00 75.00 37.50 75.00 64 ± 0.35% center spread 00100 83.31 83.31 33.32 66.64 64 ± 0.35% center spread 00101 90.00 90.00 30.00 60.00 64 ± 0.35% center spread 00110 95.00 95.00 31.67 63.33 64 ± 0.35% center spread 00111 100.00 66.67 33.33 66.67 64 ± 0.35% center spread 01000 100.00 100.00 33.33 66.67 64 ± 0.35% center spread 01001 100.00 133.34 33.33 66.67 64 ± 0.35% center spread 01010 105.00 105.00 35.00 70.00 64 ± 0.35% center spread 01011 112.00 112.00 33.60 67.20 64 ± 0.35% center spread 01100 117.99 117.99 35.40 70.80 64 ± 0.35% center spread 01101 124.09 124.09 31.02 62.05 64 ± 0.35% center spread Bit 2 01110 133.34 100.00 33.33 66.67 64 ± 0.35% center spread 00000 Bit 7:4 01111 133.34 133.34 33.33 66.67 64 ± 0.35% center spread Note1 10000 75.00 100.00 37.50 75.00 64 ± 0.35% center spread 10001 75.00 112.50 32.14 64.29 64 ± 0.35% center spread 10010 75.00 150.00 32.14 64.29 64 ± 0.35% center spread 10011 83.31 111.07 33.32 66.64 64 ± 0.35% center spread 10100 83.32 166.65 31.25 62.49 64 ± 0.35% center spread 10101 90.00 60.00 30.00 60.00 64 ± 0.35% center spread 10110 90.00 120.00 30.00 60.00 64 ± 0.35% center spread 10111 95.00 63.33 31.67 63.33 64 ± 0.35% center spread 11000 95.00 126.66 31.67 63.33 64 ± 0.35% center spread 11001 105.00 70.00 35.00 70.00 64 ± 0.35% center spread 11010 105.00 140.00 35.00 70.00 64 ± 0.35% center spread 11011 112.00 84.00 33.60 67.20 64 ± 0.35% center spread 11100 117.99 88.49 35.40 70.80 64 ± 0.35% center spread 11101 124.09 93.07 31.02 62.05 64 ± 0.35% center spread 11110 129.99 97.49 32.50 64.99 64 ± 0.35% center spread 11111 140.00 105.00 35.00 70.00 64 ± 0.35% center spread Bit 3 0 - Frequency is selected by hardware select, Latched inputs 0 1 - Frequency is selected by Bit, 2 7:4 Bit 1 0 - Normal 1 1 - Spread Spectrum Enabled Bit 0 0 - Running 0 1 - Tristate all outputs Bit Description |
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