ISL59837

FN6335 Rev 1.00

Page 13 of 14

March 5, 2007

DC-RESTORE

When the ISL59837 is AC-coupled it becomes necessary to

restore the DC reference for the signal. This is accomplished

with a DC-restore system applied between the capacitive "AC"

coupling and the input of the device. Refer to “ISL59837 + DC-

Restore Solution” on page 10.

DISABLE/POWER-DOWN

The ISL59837 can be disabled and its output placed in a high

impedance state. The turn-off time is around 25ns and the turn-

on time is around 200ns. When the PD pin is taken high, the

chip’s total supply current is reduced to 0.1mA typically, all but

eliminating the power used by the part. Taking the EN pin high

powers down the amplifiers, leaving the charge pump running.

Both pins can be controlled by standard TTL or CMOS signal

OUTPUT DRIVE CAPABILITY

The ISL59837 does not have internal short-circuit protection

circuitry. A short-circuit current of 80mA sourcing and 150mA

sinking for the output is connected half way between the rails with

a 10

 resistor. If the output is shorted indefinitely, the power

dissipation could easily increase such that the part will be

destroyed. Maximum reliability is maintained if the output current

never exceeds ±40mA, after which the electro-migration limit of

the process will be exceeded and the part will be damaged. This

limit is set by the design of the internal metal interconnections.

POWER DISSIPATION

With the high output drive capability of the ISL59837, it is

temperature under certain load current conditions. Therefore, it

is important to calculate the maximum junction temperature for

an application to determine if load conditions or package types

need to be modified to assure operation of the amplifier in a

safe operating area.

The maximum power dissipation allowed in a package is

determined according to Equation 1:

Where:

The maximum power dissipation actually produced by an IC is

the total quiescent supply current times the total power supply

voltage, plus the power in the IC due to the load, or:

for sourcing:

for sinking:

Where:

i = Number of output channels

overheat.

Power Supply Bypassing and Printed Circuit Board

Layout

Strip line design techniques are recommended for the input

and output signal traces. As with any high frequency device, a

good printed circuit board layout is necessary for optimum

performance. Lead lengths should be as short as possible. The

power supply pin must be well bypassed to reduce the risk of

pin is connected to the ground plane, a single 4.7µF tantalum

GND will suffice. This same capacitor combination should be

placed at each supply pin to ground if split-internal supplies are

supply rail.

For good AC performance, parasitic capacitance should be

kept to a minimum. Use of wire-wound resistors should be

avoided because of their additional series inductance. Use of

sockets should also be avoided if possible. Sockets add

parasitic inductance and capacitance can result in

compromised performance. Minimizing parasitic capacitance

at the amplifier's inverting input pin is also very important.

–



JA

---------------------------------------------

=

(EQ. 1)

–



+



-----------------



=

(EQ. 2)

–



+





=

(EQ. 3)