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TLE8250VSJ Datasheet(PDF) 13 Page - Infineon Technologies AG

Part # TLE8250VSJ
Description  High Speed CAN Transceiver
PDF  32 Pages
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Manufacturer  INFINEON [Infineon Technologies AG]
Direct Link  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

TLE8250VSJ Datasheet(HTML) 13 Page - Infineon Technologies AG

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Data Sheet
13
Rev. 1.0
2016-07-15
TLE8250V
High Speed CAN Transceiver
Fail Safe Functions
5
Fail Safe Functions
5.1
Short Circuit Protection
The CANH and CANL bus outputs are short circuit proof, either against GND or a positive supply voltage. A
current limiting circuit protects the transceiver against damages. If the device is heating up due to a
continuous short on the CANH or CANL, the internal overtemperature protection switches off the bus
transmitter.
5.2
Unconnected Logic Pins
All logic input pins have an internal pull-up resistor to VIO. In case the VIO supply is activated and the logical pins
are open, the TLE8250VSJ enters into the power-save mode by default. In power-save mode the transmitter of
the TLE8250VSJ is disabled and the bus bias is floating.
5.3
TxD Time-out Function
The TxD time-out feature protects the CAN bus against permanent blocking in case the logical signal on the
TxD pin is continuously “low”. A continuous “low” signal on the TxD pin might have its root cause in a locked-
up microcontroller or in a short circuit on the printed circuit board, for example. In normal-operating mode, a
logical “low” signal on the TxD pin for the time t > tTxD enables the TxD time-out feature and the TLE8250VSJ
disables the transmitter (see Figure 8). The receiver is still active and the data on the bus continues to be
monitored by the RxD output pin.
Figure 8
TxD time-out function
Figure 8 illustrates how the transmitter is deactivated and activated again. A permanent “low” signal on the
TxD input pin activates the TxD time-out function and deactivates the transmitter. To release the transmitter
after a TxD time-out event the TLE8250VSJ requires a signal change on the TxD input pin from logical “low” to
logical “high”.
TxD
t
t
CANH
CANL
RxD
t
TxD time-out
TxD time–out released
t > tTxD



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