MP2660 datasheet(4/34 Pages) MPS

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MP2660

– 0.5A, 1-CELL CHARGER W/ I2C CONTROL, POWER PATH

MP2660 Rev. 1.01

www.MonolithicPower.com

1/2/2018

MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.

PIN FUNCTIONS

Package

Pin #

Name

I/O

Description

Power

Input power. Place a ceramic capacitor (

≥1μF) from IN to GND as close to the

IC as possible.

SYS

Power

System power supply. Place a ceramic capacitor (

≥2.2μF) from SYS to GND as

close to the IC as possible.

BATT

Power

Battery. Place a ceramic capacitor (

≥2.2μF) from BATT to GND as close to the

IC as possible.

NTC

Temperature

sense

input. Connect a negative temperature coefficient

thermistor to NTC. Program the hot and cold temperature window with a resistor

divider from IN to NTC to GND. The charge is suspended when NTC is out of the

range.

INT

Open-drain interrupt output. INT can send the charging status and fault

interruption to the host. INT is used as the battery disconnection control as well.

Pull INT low for >8s to disconnect the battery from the system. The external pull-

up resistor at INT should be no

smaller than 100kΩ.

VDD

Internal control power supply. Connect a ceramic capacitor (0.1µF) from VDD

to GND. No external load is allowed on VDD.

SDA

I/O

2C Interface data. Connect SDA to the logic rail through a 10kΩ resistor.

SCL

I/O

2C Interface clock. Connect SCL to the logic rail through a 10kΩ resistor.

GND

Power

Ground.

MP2660 Datasheet(PDF) 4 Page - Monolithic Power Systems

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