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ISL6534CVZ Datasheet(PDF) 3 Page - Renesas Technology Corp |
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ISL6534CVZ Datasheet(HTML) 3 Page - Renesas Technology Corp |
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3 / 29 page  ISL6534 FN9134 Rev 2.00 Page 3 of 29 Nov 18, 2005 Block Diagram OUTPUT1 DRIVERS GATE CONTROL LOGIC DEAD-TIME CONTROL POWER ON RESET AND CONTROL VCC BOOT1 UGATE1 LGATE1 SS1/EN1 BOOT2 UGATE2 LGATE2 SS2/EN2 VCC5 30µA VCC5 VCC12 REFIN FB2 COMP2 FB1 FS/SYNC CLOCK AND SAWTOOTH GENERATOR FB3 DRIVE3 PGND GND REFERENCE COMP1 SS3/EN3 VCC5 REFOUT 0.6V 3.3V 3.3V 5.8V 3.3V VCC5 VREF 0.6V 0.6V PGOOD 3.3V 1-2 CLOCK CYCLE FILTER PGOOD = all 3 SS ramps done with no COMP short MONITOR COMP PINS FOR SHORTS IF SHORT > FILTER, SHUT DOWN ALL 3 OUTPUTS BIAS CURRENT OUTPUT2 DRIVERS GATE CONTROL LOGIC DEAD-TIME CONTROL FIGURE 1. BLOCK DIAGRAM 30µA 30µA |
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