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ATR2406 Datasheet(PDF) 6 Page - ATMEL Corporation |
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ATR2406 Datasheet(HTML) 6 Page - ATMEL Corporation |
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6 / 20 page ![]() 6 ATR2406 [Preliminary] 4779F–ISM–09/04 3.3 TX data filter clock 6 taps in filter f TXFCLK 6.912 MHz 3.4 Frequency deviation GFFM_nom ±400 kHz 3.5 Frequency deviation scaling GFFM = GFFM_nom × GFCS (see bus protocol D9 to D11) GFCS 60 130 % 3.6 Frequency drift during a slot ∆fo (drift) ±10 kHz 3.7 Harmonics 2nd Harmonic 3rd Harmonic BW = 100 kHz (1) -40.5 -46 dBc dBc 3.8 Spurious Emission 30 - 1000 MHz 1 - 12.75 GHz 1.8 - 1.9 GHz 5.15 - 5.3 GHz BW = 100 kHz (1) -40.5 -48 -70 -70 dBm dBm dBm dBm 4 Receiver Part 4.1 Sensitivity At input for BER ≤10-3 at 1152 kBit/s (1) -93 dBm 4.2 Third order input intercept point IIP3 -15 dBm 4.3 Intermodulation rejection BER < 10 -3, wanted at -83 dBm, level of interferers in channels N + 2 and N + 4 (1) IM 3 32 dBc 4.4 Co-channel rejection BER < 10 -3, wanted at -76 dBm(1) R CO -11 dBc 4.5 Adjacent channel rejection BER < 10 -3, wanted at -76 dBm, adjacent level referred to wanted channel level (1) ±1.728 MHz R i (N-1) 4dBc 4.6 Bi-adjacent channel rejection BER < 10 -3, wanted at -76 dBm, bi- adjacent level referred to wanted channel level (1) ±3.456 MHz R i (N - 2) 30 dBc 4.7 Rejection with ≥ 3 channels separation BER < 10 -3, wanted at -76 dBm, n ≥ 3 adjacent level referred to wanted channel level (1) ≥ ±5.128 MHz R i (n ≥ 3) 40 dBc 4.8 Out of band rejection > 6 MHz BER < 10 -3, wanted at -83 dBm at 2.45 GHz (1) Bldf>6MHz 38 dBc 4.9 Out of band rejection 2300 MHz to 2394 MHz 2506 MHz to 2600 GHz BER < 10 -3, wanted at -83 dBm at 2.45 GHz (1) Blnear 47 dBc 4.10 Out of band rejection 30 MHz to 2300 MHz 2600 MHz to 6 GHz BER < 10 -3, wanted at -83 dBm at 2.45 GHz (1) Blfar 57 dBc 5 RSSI Part 5.1 Maximum RSSI output voltage Under high RX input signal level VRSSImax 2.1 V Electrical Characteristics (Continued) VS = 3.6 V with AUX regulator, Tamb = 25°C, unless otherwise specified No. Parameters Test Conditions Symbol Min. Typ. Max. Unit Notes: 1. Measured and guaranteed only on the Atmel evaluation board, including PCB and balun filter. 2. Timing is determined by external loop filter characteristics. Faster timing can be achieved by modification of loop filter. For further information refer to Application Note. |
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