EL7571 datasheet(3/19 Pages) RENESAS

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EL7571

FN7298 Rev 1.00

Page 3 of 19

October 25, 2004

NOTE: Pin designators: I = Input, O = Output, S = Supply

IVID

VID Input Pull up Current

µA

IOTEN

OTEN Input Pull up Current

µA

DC Electrical Specifications

TA = 25°C, VIN = 5V, COSC = 330pF, CSLOPE = 390pF, RSENSE = 7.5m unless otherwise specified.

(Continued)

PARAMETER

DESCRIPTION

CONDITION

MIN

TYP

MAX

UNIT

AC Electrical Specifications

TA = 25°C, VIN = 5V, COSC = 330pF, CSLOPE = 390pF unless otherwise specified.

PARAMETER

DESCRIPTION

CONDITIONS

MIN

TYP

MAX

UNIT

fOSC

Nominal Oscillator Frequency

COSC = 330pF

140

190

240

kHz

fCLK

Clock Frequency

500

1000

kHz

tOTEN

Shutdown Delay

VOTEN>1.5V

100

tSYNC

Oscillator Sync. Pulse Width

Oscillator i/p (COSC) driven with

HCMOS gate

800

TSTART

Soft-start Period

VOUT = 3.5V

100/fCLK

DMAX

Maximum Duty Cycle

Pin Descriptions

PIN NO.

PIN NAME

PIN TYPE

(NOTE 1)

FUNCTION

OTEN

Chip enable input, internal pull up (5mA typical). Active high.

CSLOPE

With a capacitor attached from CSLOPE to GND, generates the voltage ramp compensation for the PWM

current mode controller. Slope rate is determined by an internal 14uA pull up and the CSLOPE capacitor

value. VCSLOPE is reset to ground at the termination of the high side cycle.

COSC

Multi-function pin: with a timing capacitor attached, sets the internal oscillator rate fS (kHz) = 57/COSC (µF);

when pulsed low for a duration tSYNC synchronizes device to an external clock.

REF

Band gap reference output. Decouple to GND with 0.1uF.

PWRGD

Power good, open drain output. Set low whenever the output voltage is not within ±13% of the programmed

value.

VID0

Bit 0 of the output voltage select DAC. Internal pull up sets input high when not driven.

VID1

Bit 1 of the output voltage select DAC. Internal pull up sets input high when not driven.

VID2

Bit 2 of the output voltage select DAC. Internal pull up sets input high when not driven.

VID3

Bit 3 of the output voltage select DAC. Internal pull up sets input high when not driven.

VID4

Bit 4 of the output voltage select DAC. Internal pull up sets input high when not driven.

Voltage regulation feedback input. Tie to VOUT for normal operation.

Current sense. Current feedback input of PWM controller and over current capacitor input. Current limit

threshold set at +154mV with respect to FB. Connect sense resistor between CS and FB for normal

operation.

GND

Ground

GNDP

Power ground for low side FET driver. Tie to GND for normal operation.

LSD

Low side gate drive output.

VINP

Input supply voltage for low side FET driver. Tie to VIN for normal operation.

VIN

Input supply voltage for control unit.

Negative supply input for high side FET driver.

HSD

High side gate drive output. Driver ground referenced to LX. Driver supply may be bootstrapped to enhance

low controller input voltage operation.

VH1

Positive supply input for high side FET driver.

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