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ISL6563CRZ Datasheet(PDF) 7 Page - Renesas Technology Corp |
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ISL6563CRZ Datasheet(HTML) 7 Page - Renesas Technology Corp |
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7 / 20 page ![]() ISL6563 FN9126 Rev 8.00 Page 7 of 20 Jun 10, 2010 For more information, refer to the ‘Output Voltage Offset Programming’ paragraph. SSEND (Pin 10) This pin is an end of Soft-Start (SS) indicator; open drain output device stays ON during soft-start, and goes open when soft-start ends. Operation Figure 1 shows a simplified diagram of the voltage regulation and current control loops. Both voltage and current feedback are used to precisely regulate the output voltage and tightly control the output currents, IL1 and IL2, of the two power channels. Voltage Loop Feedback from the output voltage is applied via resistor R1 to the inverting input of the Error Amplifier. This signal can drive the Error Amplifier output either high or low, depending upon the output voltage. Low output voltage makes the amplifier output move towards a higher output voltage level. Amplifier output voltage is applied to the positive inputs of the PWM Circuit comparators via the correction summing networks. Out-of-phase sawtooth signals are applied to the two PWM comparators inverting inputs. Increasing Error Amplifier voltage results in increased Comparator output duty cycle. This increased duty cycle signal is passed through the output drivers with no phase reversal to drive the external upper MOSFETs. Increased duty cycle or ON time for the upper MOSFET transistors results in increased output voltage to compensate for the low output voltage sensed. Current Loop The current control loop works in a similar fashion to the voltage control loop, but with current control information applied individually to each channel’s Comparator. The information used for this control is the voltage that is developed across the rDS(ON) of each lower MOSFET, while they are conducting. A single resistor converts and scales the voltage across the MOSFETs to a current that is applied to the Current Sensing circuit within the ISL6563. Output from these sensing circuits is applied to the current averaging circuit. Each PWM channel receives the difference current signal from the summing circuit that compares the average sensed current to the individual channel current. When a power channel’s current is greater than the average current, the signal applied via the summing Correction circuit to the Comparator, reduces the output pulse width of the Comparator to compensate for the detected “above average” current in that channel. Droop Implementation In addition to controlling each channel’s output current, the average channel current is used to implement an output FIGURE 1. SIMPLIFIED BLOCK DIAGRAM OF THE ISL6563 VOLTAGE AND CURRENT CONTROL LOOPS DROOP SOURCE, IFB AVERAGE CURRENT SENSE DAC & REFERENCE PWM CIRCUIT PWM CIRCUIT HALF-BRIDGE DRIVE HALF-BRIDGE DRIVE OSCILLATOR COMP FB L1 L2 COUT VOUT VIN VIN RISEN UGATE1 UGATE2 LGATE1 LGATE2 PHASE1 PHASE2 ISEN CURRENT SENSE VCC R1 R2 C2 ERROR AMP |
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