EL8170, EL8173

FN7490 Rev 8.00

Page 11 of 14

August 11, 2015

Input Bias Cancellation, Input

Bias Compensation

The EL8170 and EL8173 are features an Input Bias Cancellation

and Input Bias Compensation Circuit for both the input and

feedback terminals (IN+, IN-, FB+ and FB-), achieving a low input

bias current all throughout the input common-mode range and the

operating temperature range. While the PNP bipolar input stages

are biased with an adequate amount of biasing current for speed

and increased noise performance, the Input Bias Cancellation and

the Input Bias Compensation Circuit, sinks most of the base

current of the input transistor leaving a small portion as input bias

current, typically 500pA. In addition, the Input Bias Cancellation

and Input Bias Compensation Circuit, maintains a smooth and flat

behavior of the input bias current over the common mode range

and over the operating temperature range. The Input Bias

Cancellation and Input Bias Compensation Circuit, operates from

the input voltages of 10mV above the negative supply to the input

voltages slightly above the positive supply. See “Average Input Bias

Current vs Common-Mode Input Voltage” in the “Typical

Performance Curves” beginning on page 4.

Output Stage and Output Voltage Range

to within a few millivolts of the supply rails. At a 100k

 load, the

PMOS sources current and pulls the output up to 4mV below the

positive supply, while the NMOS sinks current and pulls the

output down to 4mV above the negative supply, or ground in the

case of a single supply operation. The current sinking and

sourcing capability of the EL8170 and EL8173 are internally

limited to 26mA.

Gain Setting

the input offset voltage) across FB+ and FB-. The objective of the

EL8170 and EL8173 in-amp is to maintain the differential

voltage across FB+ and FB- equal to IN+ and IN-; (FB- - FB+) =

(IN+ - IN-). Consequently, the transfer function can be derived.

The gain of the EL8170 and EL8173 is set by two external

to GND. With this configuration, Equation 1 is only true for a positive

swing in VIN; negative input swings will be ignored and the output

will be at ground.

Reference Connection

Unlike a three op amp instrumentation amplifier, a finite series

resistance seen at the REF terminal does not degrade the

EL8170 and EL8173's high CMRR performance, eliminating the

need for an additional external buffer amplifier. The circuit shown

in Figure 38 uses the FB+ pin as a REF terminal to center or to

adjust the output. Because the FB+ pin is a high impedance

input, an economical resistor divider can be used to set the

voltage at the REF terminal. The reference voltage error due to

the input bias current is minimized by keeping the values of the

according to Equation 2. Note that any noise or unwanted signals

on the reference supply will be amplified at the output according

to Equation 2.

The FB+ pin can also be connected to the other end of resistor,

and EL8173 in-amps maintain constant differential voltage

across the input terminals and feedback terminals

(IN+ - IN- = FB+ - FB-), the transfer function of Figure 39 can be

and susceptibility to external noise is reduced.

1

3

2

8

5

4

7

6

+

-

+

-

IN+

IN-

FB+

FB-

V+

V-

RF

RG

VOUT

EL8170,

VCM

VIN/2

VIN/2

EL8173

1

--------

+







=

(EQ. 1)

1

--------

+









1

--------

+









+

=

(EQ. 2)

FIGURE 38. GAIN SETTING AND REFERENCE CONNECTION

1

3

2

8

5

4

7

6

+

-

+

-

IN+

IN-

FB+

FB-

V+

V-

+2.4V TO +5.5V

RF

RG

VOUT

EL8170,

VCM

VIN/2

VIN/2

REF

+2.4V TO +5.5V

R1

R2

EL8173