SGM706-RYS8GSLASHTR datasheet(3/13 Pages) SGMICRO

3 / 13 page

Low-Cost, Microprocessor

SGM706

Supervisory Circuit

DECEMBER 2017

SG Micro Corp

www.sg-micro.com

PIN CONFIGURATIONS

SGM706-L/M/J/T/S/R (TOP VIEW)

SGM706-S (TOP VIEW)

SGM706

-L/M/J/T/S/R

VCC

GND

PFI

WDI

WDO

PFO

RESET

SGM706-S

VCC

GND

PFI

WDI

WDO

PFO

RESET

SOIC-8

MSOP-8

PIN DESCRIPTION

NAME

FUNCTION

SOIC-8

MSOP-8

Manual-Reset Input triggers a reset pulse when pulled below 0.8V. This active-low input

has an internal 250μA (VCC = +5V) pull-up current. It can be driven from a TTL or CMOS

logic line as well as shorted to ground with a switch.

VCC

Power Supply Voltage that is monitored.

GND

0V Ground Reference for all signals.

PFI

Power-Fail Voltage Monitor Input. When PFI is less than 1.25V, PFO goes low.

Connect PFI to GND or VCC when not used.

PFO

Power-Fail Output goes low and sinks current when PFI is less than 1.25V; otherwise

PFO stays high.

WDI

Watchdog Input. If WDI remains high or low for 1.6sec, the internal watchdog timer runs

out and WDO goes low (BLOCK DIAGRAM). Floating WDI or connecting WDI to a

high-impedance three-state buffer disables the watchdog feature. The internal watchdog

timer clears whenever reset is asserted, WDI is three-stated, or WDI sees a rising or

falling edge.

RESET

Active-Low Reset Output pulses low for 200ms when triggered, and stays low whenever

VCC is below the reset threshold (4.65V for SGM706-L, 4.4V for SGM706-M, 4.0V for

SGM706-J, 3.08V for SGM706-T and 2.93V for SGM706-S, 2.63V for SGM706-R). It

remains low for 200ms after VCC rises above the reset threshold or MR goes from low to

high. A watchdog timeout will not trigger RESET unless WDO is connected to MR .

WDO

Watchdog Output pulls low when the internal watchdog timer finishes its 1.6sec count

and does not go high again until the watchdog is cleared. WDO also goes low during

low-line conditions. Whenever VCC is below the reset threshold, WDO stays low;

however, unlike RESET , WDO does not have a minimum pulse width. As soon as VCC

rises above the reset threshold, WDO goes high with no delay.

SGM706-RYS8G/TR Datasheet(PDF) 3 Page - SG Micro Corp

SGM706-RYS8G/TR Datasheet(HTML) 3 Page - SG Micro Corp

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