EM6580WS11 datasheet(35/55 Pages) EMMICRO

35 / 55 page

EM6580

03/07, rev. J

www.emmicroelectronic.com

select one of 16 possible levels to check and by making max. 4 measurements at 4 different levels (if input

PA[4] is stable) we have the result with successive approximation method.

In this case PA[4] input is blocked for all other functions, because its level can be in a zone where logic ‘0’ or ‘1’

are not well defined and this would generate an over consumption otherwise. So it is dedicated only to SVLD

comparator input to be compared with internal band-gap reference. NoPullPA[4] must be set to ‘1’ - Pull-

UP/Down must be removed by register also.

In both cases if Vbat (Vdd) or PA[4] level is tested than if selected tested level lower an IRQ can be generated if

enabled.

With SVLDen bit one can switch on the band-gap, resistive divider and Comparator continuously. Like that one

can monitor Vbat or PA[4] level continuously, at higher frequency (ck[15]). Only at the beginning after setting

the SVLDen at ‘1’ one has to wait until VLDbusy drops to ‘0’ indicating that system is powered up (band-gap

reference and resistor divider are stabilized and comparator is ready to give proper result). This will increase

power consumption by typ. 4цA @ Vdd=1.5V while used.

During continuously monitoring one can change RegSVLDlev register value on fly and the new result should

be read only after about 1.5 * ck[15] to be sure it is a result of a new SVLDlev selection. Depending on CPUclk

and divisions to obtained SysClk this can be 2 / 6 / 10 / 20 / 36 instruction after RegSVLDlev change for

multiples by 1 / 2 / 4 / 8 / 16.

When fast monitoring is not necessary any more one can remove it by clearing SVLDen to ‘0’.

When SVLD logic is used for this fast monitoring IRQ can also be generated when checked level falls below its

value.

Figure 23. SVLD timing in “ADC” mode when SVLDen set @ “1”

Due to IRQSvld which can come very fast – with ck[15] there is danger that immediately after coming out from

IRQ subroutine new IRQSvld which came during that time put uC back in IRQ subroutine and software can be

stacked at this place until checked input is lower then SVLD level. Otherwise IntEn register must be cleared in

IRQ subroutine already !! or even better to use this function by reading the SVLD result only and not setting the

MaskIRQSvld.

EM6580WS11 Datasheet(PDF) 35 Page - EM Microelectronic - MARIN SA