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X76F200PI Datasheet(PDF) 1 Page - Xicor Inc. |
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X76F200PI Datasheet(HTML) 1 Page - Xicor Inc. |
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1 / 16 page  ISO 7816 Compatible ©Xicor, Inc. 1999 Patents Pending 9900-5004.3 1/26/99 EP 1 Characteristics subject to change without notice 2K X76F200 256 x 8 bit Functional Diagram Secure SerialFlash FEATURES • 64-bit Password Security • One Array (240 Bytes) Two Passwords (16 Bytes) —Read Password —Write Password • Programmable Passwords • Retry Counter Register —Allows 8 tries before clearing of the array • 32-bit Response to Reset (RST Input) • 8 byte Sector Write mode • 1MHz Clock Rate • 2 wire Serial Interface • Low Power CMOS —2.0 to 5.5V operation —Standby current Less than 1µA —Active current less than 3 mA • High Reliability Endurance: —100,000 Write Cycles • Data Retention: 100 years • Available in: —8 lead PDIP, SOIC, TSSOP, Smart Card and Smart Card Module DESCRIPTION The X76F200 is a Password Access Security Supervisor, containing one 1920-bit Secure SerialFlash array. Access to the memory array can be controlled by two 64-bit passwords. These passwords protect read and write operations of the memory array. The X76F200 features a serial interface and software protocol allowing operation on a popular two wire bus. The bus signals are a clock Input (SCL) and a bidirectional data input and output (SDA). The X76F200 also features a synchronous response to reset providing an automatic output of a hard-wired 32-bit data stream conforming to the industry standard for memory cards. The X76F200 utilizes Xicor’s proprietary Direct WriteTM cell, providing a minimum endurance of 100,000 cycles and a minimum data retention of 100 years. LOGIC CS SCL SDA RST INTERFACE 8K BYTE DATA TRANSFER ARRAY ACCESS ENABLE RESET RESPONSE REGISTER PASSWORD ARRAY AND PASSWORD VERIFICATION LOGIC CHIP ENABLE RETRY COUNTER SerialFlash ARRAY 32 BYTE SerialFlash ARRAY ARRAY 0 ARRAY 1 (PASSWORD PROTECTED) (PASSWORD PROTECTED) 7025 FM 01 Logic SCL SDA RST Interface 240 Byte Data Transfer Array Access Enable ISO Reset Response Register Password Array and Password Verification Logic Retry Counter Erase Logic EEPROM Array |
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