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FT27C010 Datasheet(PDF) 8 Page - Force Technologies Ltd |
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FT27C010 Datasheet(HTML) 8 Page - Force Technologies Ltd |
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8 / 11 page ![]() FT27C010(L) Rapid Programming Algorithm A 100 µs PGM pulse width is used to pr ogram. The address is set to the first location. VCC is raised to 6.5V and VPP is raised to 13.0V. Each address is first programmed with one 100 µs PGM pulse without verification. Then a verification / reprogramming loop is executed for each address. In the event a byte fails to pass verification, up to 10 successive 100 µs pulses are applied with a verification after each pulse. If the byte fails to verify after 10 pulses have been applied, the part is considered failed. After the byte verifies properly, the next address is selected until all have been checked. VPP is then lowered to 5.0V and VCC to 5.0V. All bytes are read again and compared with the origi- nal data to determine if the device passes or fails. 2006 8/11 Rev 1 |
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