M36L0R7050T0, M36L0R7050B0

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PART NUMBERING

Table 11. Ordering Information Scheme

Devices are shipped from the factory with the memory content bits erased to ’1’. For a list of available op-

tions (Speed, Package, etc.) or for further information on any aspect of this device, please contact the ST-

Microelectronics Sales Office nearest to you.

Example:

M36 L 0 R 7 0 5 0 T 0 ZAQ T

Device Type

M36 = Multi-Chip Package (Multiple Flash + RAM)

Flash 1 Architecture

L = Multilevel, Multiple Bank, Burst mode

Flash 2 Architecture

0 = No Die

Operating Voltage

Flash 1 Density

7 = 128 Mbit

Flash 2 Density

0 = No Die

RAM 1 Density

5 = 32 Mbit

RAM 0 Density

0 = No Die

Parameter Blocks Location

T = Top Boot Block Flash

B = Bottom Boot Block Flash

Product Version

0 = 0.13µm Flash technology, 85ns speeds;

0.18µm RAM, 85ns speed

Package

ZAQ = Stacked TFBGA88 8x10mm - 8x10 active ball array, 0.8mm pitch

Option

Blank = Standard Packing

T = Tape & Reel Packing

E= Lead-free and RoHS package, standard packing

F= Lead-free and RoHS package, tape and reel packing