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LP5030 Datasheet(PDF) 17 Page - Texas Instruments

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Part # LP5030
Description  36-, 30-Channel 12-Bit PWM Ultralow Quiescent Current I2C RGB LED Drivers
PDF  57 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

LP5030 Datasheet(HTML) 17 Page - Texas Instruments

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LP5030, LP5036
www.ti.com
SLVSEH1 – SEPTEMBER 2018
Product Folder Links: LP5030 LP5036
Submit Documentation Feedback
Copyright © 2018, Texas Instruments Incorporated
Device Functional Modes (continued)
In case of any I2C command to this device, it goes back to the NORMAL mode.
•
SHUTDOWN: The device enters into SHUTDOWN mode from all states on VCC power up or when EN = L.
ICC is < 1 µA (max).
•
STANDBY: The device enters the STANDBY mode when Chip_EN (register bit) = 0. In this mode, all the
OUTx are shut down, but the registers retain the data and keep it available via I2C. STANDBY is the low-
power-consumption mode, when all circuit functions are disabled. ICC is 10 µA (typ.).
•
THERMAL SHUTDOWN: The device automatically enters the THERMAL SHUTDOWN mode when the
junction temperature exceeds 160°C (typical). In this mode, all the OUTx outputs are shut down. If the
junction temperature decreases below 145°C (typical), the device returns to the NORMAL mode.
8.5 Programming
8.5.1 I2C Interface
The I2C-compatible two-wire serial interface provides access to the programmable functions and registers on the
device. This protocol uses a two-wire interface for bidirectional communications between the devices connected
to the bus. The two interface lines are the serial data line (SDA) and the serial clock line (SCL). Every device on
the bus is assigned a unique address and acts as either a master or a slave depending on whether it generates
or receives the serial clock, SCL. The SCL and SDA lines should each have a pullup resistor placed somewhere
on the line and remain HIGH even when the bus is idle.
8.5.1.1 Data Validity
The data on SDA line must be stable during the HIGH period of the clock signal (SCL). In other words, the state
of the data line can only be changed when the clock signal is LOW.
Figure 11. Data Validity
8.5.1.2 Start and Stop Conditions
START and STOP conditions classify the beginning and the end of the data transfer session. A START condition
is defined as the SDA signal transitioning from HIGH to LOW while the SCL line is HIGH. A STOP condition is
defined as the SDA transitioning from LOW to HIGH while SCL is HIGH. The bus master always generates
START and STOP conditions. The bus is considered to be busy after a START condition and free after a STOP
condition. During data transmission, the bus master can generate repeated START conditions. First START and
repeated START conditions are functionally equivalent.



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