TH72036 datasheet(7/16 Pages) MELEXIS

7 / 16 page

TH72036

868/915MHz

FSK/ASK Transmitter

Page 7 of 16

REVISION 010 - JUNE 14, 2017

3901072036

2.8. Mode Control Logic

The mode control logic allows two different modes

of operation as listed in the following table. The

mode control pin EN is pulled-down internally. This

guarantees that the whole circuit is shut down if

this pin is left floating.

Mode

Description

TX standby

TX disabled

TX active

CKOUT active

TX / CKOUT

enabled

2.9. Clock Output

The clock output CKOUT is CMOS-compatible and can be used to drive a microcontroller. The frequency of the clock

can be selected by the clock divider control signal CKDIV, according to the following table.

A capacitor at pin CKOUT can be used to control the clock voltage swing and the RF spurious emission.

CKDIV

Clock divider ratio

Clock frequency / fc=868.3MHz

3.39MHz

848kHz

2.10. Timing Diagrams

After enabling the transmitter by the EN signal, the power amplifier remains inactive for the time ton, the transmitter

start-up time. The crystal oscillator starts oscillation and the PLL locks to the desired output frequency within the time

duration ton. After successful PLL lock, the LOCK signal turns on the power amplifier, and then the RF carrier can be FSK

or ASK modulated.

Fig. 5: Timing diagrams for FSK and ASK modulation

RF carrier

low

high

LOCK

FSKDTA

low

high

t on

low

high

LOCK

PSEL

low

high

t on

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