HTADC12 datasheet(9/12 Pages) HONEYWELL

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Closed Loop – Processor Controlled

This mode requires control the input enable pins CE, NCS, and

RNC. The STS signal will be used to notify the processor that a

conversion is complete. The processor then changes the state

of RNC to read the output data.

Assuming that CE is high and NCS is low, a typical conversion

sequence might thus be:

(1) CE and NCS are set to activate the device.

(2) RNC is then changed from a high to a low value which

starts the conversion.

Symbol

Parameter

Min.

Typ.

Max.

Units

Setup Time NCS To RNC

Setup Time CE To RNC

STS Delay From RNC

100

Conversion Time

11.5

µs

READ Delay After Enable

High Z Delay After Disable

(3) The STS signal will then go to a high value.

(4) When the conversion is complete, STS will go low.

This will be detected by the processor/controller.

(5) The controller then sets RNC back to a high level and the

signaling the data can be read at the outputs.

(6) Following the read, CE and NCS are then set to disable the

device and putting the outputs into a high impedance state.

Closed Loop Timing Diagram

HTADC12 Datasheet(PDF) 9 Page - Honeywell Solid State Electronics Center