IXYS Reserves the Right to Change Limits, Test Conditions, and Dimensions.

IXTA140N12T2

IXTP140N12T2

Fig. 7. Input Admittance

0

40

80

120

160

200

240

3.03.5

4.04.5

5.05.5

6.06.5

7.0

25

- 40

Fig. 8. Transconductance

0

40

80

120

160

200

240

0

20

40

60

80

100

120

140

160

180

200

25

150

Fig. 9. Forward Voltage Drop of Intrinsic Diode

0

100

200

300

400

500

600

700

800

0.0

0.4

0.8

1.2

1.6

2.0

2.4

2.8

Fig. 10. Gate Charge

0

2

4

6

8

10

0

20

40

60

80

100

120

140

160

180

Fig. 11. Capacitance

10

100

1,000

10,000

100,000

0

5

10

15

20

25

30

35

40

f = 1 MHz

Ciss

Crss

Coss

Fig. 12. Forward-Bias Safe Operating Area

0.1

1

10

100

1000

1

10

100

1,000

100μs

1ms

10ms

Single Pulse

DC